It's hardly possible that returns false if dev_config->spics_io_num = -1
I'm using it that way and newer had an error.

... However the way I understand it is that the CS line will get toggled with each of the spi_device_transmit()... You can use transactions without CS and (de)activate CS pin in software: spi_device_interface_config_t devcfg={ .clock_speed_hz=10000000, //Clock out at 10 MHz .mode=0, //SPI mode 0 .s...

Is there any way to configure RTC to run with 32.768 crystal ? This can be very important, as the current implementation of RTC in deep sleep with internal 150 kHz clock is very inaccurate. On my board (does it depend on board/module ?) RTC runs approximately 3,2% to fast when in deep sleep. I've tr...

Hi, Kolbain This fork is mainly for my own usage and testing the features which I need most. It is in no way intended to compete with original Whitecat's Lua project. The original maintainer has his own time line and priorities, and some of the changes and additions will eventually be (and were) acc...

LUA RTOS ESP32 is an excelent porgramming environment. It is WIP and new modules and features are added frequently. Some features I was interested in are not yet available in the main repository https://github.com/whitecatboard/Lua-RTOS-ESP32 , so I've opened my own repository with some additional f...

You can hardly expect good results from embeded ADC on any microcontroller. Some software techniques must always be used to improve the results. There are many documents about that, here are some links: http://www.st.com/content/ccc/resource/technical/document/application_note/9d/56/66/74/4e/97/48/9...

Add include path ${IDF_PATH}/components/driver/include
and use

Thanks for the confirmation regarding QIO mode support. 1. Is DIO @80MHz tested on DevKitC (ESP-WROOM-32)? 2. Can you kindly list the target device families from GigaDevice and Winbond for which QIO mode will be supported? 3. For the planned feature support on this matter, will SPI Flash devices wi...

That is exactly the information I've needed. It opens the whole new word to ESP32 development.
Great work Espressif!

I understand it is hard to give more dailes about feature not yet ready for production. But it would be very usefull for product development planning to know a little bit more about what we can expect from SPI RAM addition. Will it be available as heap/stack? What kind of performance (speed) can we ...