Search found 73 matches
- Tue Oct 27, 2020 1:46 am
- Forum: ESP-IDF
- Topic: Change of SPI phase.
- Replies: 2
- Views: 2509
Re: Change of SPI phase.
I assume that you have a spi_device_interface_config_t sttructure for each device. I believe the fourth field is mode and you want to find which mode is more successful for each device. I do not feel like getting eye strain at the moment.
- Tue Oct 27, 2020 1:32 am
- Forum: ESP-IDF
- Topic: WiFi authentication fail
- Replies: 0
- Views: 1468
WiFi authentication fail
I am using the 4.0.1 development environment on a ESP32-U4WDH device. System Logging is at debug level and all the wifi tools are turned on. I have a number of custom boards which fail to connect as a WiFi access point. This seems to be usually stuck on the PTKINITNEGOTIATING failure shown in the lo...
- Tue Oct 20, 2020 1:10 am
- Forum: Hardware
- Topic: Cannot upload code via computer
- Replies: 7
- Views: 5897
Re: Cannot upload code via computer
I might think that the bad rate should be 115,200 rather than 112,500. I believe that difference would would take it out of the 3% timing error RS232 use to allow on slow data lines before the advent of good timing chips. Does a scope show activity on the chip TX pin even if your PC does not?
- Wed Oct 14, 2020 9:02 pm
- Forum: ESP IoT Solution
- Topic: Known Issue of DMA and SPI in 4 Wire
- Replies: 5
- Views: 5614
Re: Known Issue of DMA and SPI in 4 Wire
Close this issue, workaround identified
- Wed Oct 14, 2020 6:53 pm
- Forum: ESP IoT Solution
- Topic: Known Issue of DMA and SPI in 4 Wire
- Replies: 5
- Views: 5614
Re: Known Issue of DMA and SPI in 4 Wire
I seem to see a command bits of one in the spi_device_interface_config_t declaration above. Perhaps there is another bit you think should also be set. It reflects on my Scope as the first bit out being high causing the device to transmit the register associated with the address. I too thought that t...
- Tue Oct 13, 2020 10:44 pm
- Forum: ESP IoT Solution
- Topic: Known Issue of DMA and SPI in 4 Wire
- Replies: 5
- Views: 5614
Re: Known Issue of DMA and SPI in 4 Wire
THE INIT: spi_device_interface_config_t MY_VSPI_IFcfg = { 1, // uint8 command_bits simply T/R:: For a write, set the first bit to 0, and for a read, set this bit to 1. 15, // uint8_t address_bits; /// Default amount of bits in address phase (0-64), used when //``SPI_TRANS_VARIABLE_ADDR`` is not used...
- Mon Oct 12, 2020 10:48 pm
- Forum: ESP IoT Solution
- Topic: Known Issue of DMA and SPI in 4 Wire
- Replies: 5
- Views: 5614
Known Issue of DMA and SPI in 4 Wire
Is there any plan to improve the non-DMA Driver for the SPI Interfaces or allow DMA and 4-wire to work together? If I need to transfer blocks of data back and forth in 64 byte chunks, it would be tedious. For testing purposes I would like to get a 2k read in once command, as it would let me see if t...
- Tue Oct 06, 2020 10:34 pm
- Forum: Hardware
- Topic: ESP32 SPI CS
- Replies: 3
- Views: 8033
Re: ESP32 SPI CS
You have to remember that there are only 48 real pins on the device, and of those 15 have a single permanent purpose. So all the other desired features have to be allocated as needed. If you are not using the internal DAC, then those are good GPIOs or CS pins. The high number (34+) GPIOs are input o...
- Tue Oct 06, 2020 10:19 pm
- Forum: Hardware
- Topic: ADC1: 6 channels or 8 channels
- Replies: 1
- Views: 1967
Re: ADC1: 6 channels or 8 channels
My datasheet has:
Name No. Type Function
SENSOR_CAPP 6 I GPIO37, ADC1_CH1, RTC_GPIO1
SENSOR_CAPN 7 I GPIO38, ADC1_CH2, RTC_GPIO2
But it will depend on what other features you are using.
You may need to reroute other desired features to other pins in order to clear 6&7
Name No. Type Function
SENSOR_CAPP 6 I GPIO37, ADC1_CH1, RTC_GPIO1
SENSOR_CAPN 7 I GPIO38, ADC1_CH2, RTC_GPIO2
But it will depend on what other features you are using.
You may need to reroute other desired features to other pins in order to clear 6&7
- Wed Sep 23, 2020 11:07 pm
- Forum: Hardware
- Topic: Gaps in ADC voltage response when using DMA
- Replies: 15
- Views: 14347
Re: Gaps in ADC voltage response when using DMA
In my opinion, it would be good to know what, if any, input you got at that time. One might need to know what parameters are being sent to the ADC and the DMA. Is it a case of failing to finish settling in the allowed time slice? Is the output a value that interferes with the DMA operation or causes...