Search found 71 matches
OTA issue
It seems my erase and write process is working well, but when I get to the end I get the following: E (114474) esp_image: Segment 1 has load address 0x3f400010, conflict with segment data at 0x00118010 E (114661) esp_image: Segment 7 has load address 0x400d0018, conflict with segment data at 0x00148...
- Sat May 06, 2017 12:37 am
- Forum: General Discussion
- Topic: Device quick connect
- Replies: 2
- Views: 4212
Re: Device quick connect
I2C, or SPI, or UART.
- Fri May 05, 2017 7:36 am
- Forum: General Discussion
- Topic: OTA of factory app
- Replies: 7
- Views: 13488
Re: OTA of factory app
How do you instruct the tool to use OTA0 as the factory flash location? I put the correct offset into menuconfig, but I still get this: I (12) boot: compile time 03:25:01 I (13) boot: Enabling RNG early entropy source... I (13) qio_mode: Enabling QIO for flash chip ISSI I (14) boot: SPI Speed : 80MH...
- Thu May 04, 2017 8:50 am
- Forum: ESP-IDF
- Topic: Crash issues with WiFi
- Replies: 4
- Views: 7228
Re: Crash issues with WiFi
Thanks for the clues. I will do some more analysis. This is basically powersave example plus GPIO setup, one UART, and LED intensity variation.
- Thu May 04, 2017 5:35 am
- Forum: ESP-IDF
- Topic: Crash issues with WiFi
- Replies: 4
- Views: 7228
Crash issues with WiFi
I keep getting this crash, even just using WiFi station mode. I'm using essentially the same code as the WiFi powersave example. Thoughts? I (12) boot: ESP-IDF v2.0-rc1-725-g07b61d54 2nd stage bootloader I (12) boot: compile time 00:14:16 I (13) boot: Enabling RNG early entropy source... I (13) qio_...
- Thu May 04, 2017 4:06 am
- Forum: Hardware
- Topic: ESP32 interrupts during flashing
- Replies: 5
- Views: 8150
Re: ESP32 interrupts during flashing
The flash process seems to be pretty time-critical. If I don't have a perfect electrical connection when it starts it will never start, for instance, have to ctrl-c and restart 'make flash.'
- Sat Apr 22, 2017 5:20 am
- Forum: Hardware
- Topic: Needed additional pins for PSRAM
- Replies: 22
- Views: 34635
Re: Needed additional pins for PSRAM
Does this mean GPIO9 and GPIO10 can be used instead of GPIO16 and GPIO17? Also, are the pins physically wired or can the GPIO matrix be used to switch out the pin functions? Thanks!
- Thu Apr 20, 2017 6:46 pm
- Forum: Hardware
- Topic: GPIO16/17 initialization issues
- Replies: 2
- Views: 5266
Re: GPIO16/17 initialization issues
Ok, because 16 &17 aren't used by the D0WD for flash communication. Are any of the VDIO power domain pins available as GPIOs on D2WD? Thanks!
- Wed Apr 19, 2017 7:10 am
- Forum: Hardware
- Topic: GPIO16/17 initialization issues
- Replies: 2
- Views: 5266
GPIO16/17 initialization issues
I'm getting a crash when I do the following: #define SETGPIO(num) \ gpio_set_direction(num, GPIO##num##_MODE); \ if (GPIO##num##_MODE == GPIO_MODE_OUTPUT || GPIO##num##_MODE == GPIO_MODE_INPUT_OUTPUT_OD) \ gpio_set_level(num, GPIO##num##_LEVEL); \ gpio_set_pull_mode(num, GPIO##num##_PULL); \ if (GPI...
- Wed Apr 19, 2017 7:08 am
- Forum: Hardware
- Topic: VDD_SDIO for ESP32 D2WD
- Replies: 43
- Views: 53615
Re: VDD_SDIO for ESP32 D2WD
What happens if we don't do this? I have been running for several days on a proto board without issue..., with MTDI left floating. What is the consequence?