ESP-WROOM-32 ADC VREF Calibration

connor
Posts: 6
Joined: Fri Sep 29, 2017 6:35 pm

ESP-WROOM-32 ADC VREF Calibration

Postby connor » Tue Nov 14, 2017 10:49 pm

Hello,

Regarding the ESP 32 ADC VREF issues, is VREF currently being measured at the factory and burned into the efuse?

Here is a quote from igrr on GitHub:

"Large scale: new chips produced starting from (some date)(1) will have their V_REF burned into efuse at production. Calibration code will automatically pull this value from efuse."

Is there an ETA on this being in place?

Thanks,
Connor

Fractalstability
Posts: 1
Joined: Sun Jan 28, 2018 12:25 am

Re: ESP-WROOM-32 ADC VREF Calibration

Postby Fractalstability » Sun Jan 28, 2018 12:42 am

Hi all, bumping this thread to say we are also waiting to hear about the efuses and the ADC ref calibration from the factory.

Is it possible to know the planned format of the efuses so we can write our own VREF there for the time being?

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