PSRAM read-only performance

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Joined: Sun Jun 14, 2020 11:27 am

PSRAM read-only performance

Postby vroland » Sun Jun 14, 2020 11:50 am


Finding this forum very helpful as a silent reader, I now hope to get my own question answered as well :)
I'm working on a E-Ink driver board based on the ESP32 ( ... controller). Those displays are driven by scanning an active matrix and applying some voltage multiple times to reach a desired grey value. Thus, performance is critical for reasonable update speeds.

As a 1200x825 4-bit framebuffer gets quite large (0.5MB), I use a WROVER-module with external SPIRAM, where framebuffers are stored.
This framebuffer has to be read for every matrix scan, making this data transfer the bottleneck of my application. Using one core solely for copying data, the troughput is ~20MB/s, which seems to be what I can expect when going through the cache (viewtopic.php?t=8492).

However, some threads mention 40MB/s as the theoretical maximum (, viewtopic.php?t=7158). Is that possible to achieve in practice somehow? E.g. by bypassing the cache or talking to the RAM directly? Maybe a way to issue larger reads?
Just curious to see if there's still room for improvement.


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Joined: Thu Nov 26, 2015 4:08 am

Re: PSRAM read-only performance

Postby ESP_Sprite » Mon Jun 15, 2020 10:29 am

In theory you should already get close to 40MByte/sec when only reading the PSRAM. The 20MByte/sec figure is only for writes.

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