[SOLVED] bootloop using v3.2 bootloader with v3.3-rc app

chrismerck
Posts: 47
Joined: Tue May 29, 2018 8:00 pm

[SOLVED] bootloop using v3.2 bootloader with v3.3-rc app

Postby chrismerck » Wed Aug 21, 2019 7:40 pm

We get a crash in the v3.1 (or v3.2) bootloader when attempting to jump to the v3.3-rc application.

Note that if I upgrade the bootloader to v3.3-rc, it works fine.

Is there any known incompatibility here? I can try reproducing with a minimal example if that helps.

Code: Select all

Rebooting...
I (29) boot: ESP-IDF v3.1-beta1-388-g8683c0e 2nd stage bootloader
I (29) boot: compile time 20:50:11
I (29) boot: Enabling RNG early entropy source...
I (29) boot: SPI Speed      : 40MHz
I (30) boot: SPI Mode       : DIO
I (30) boot: SPI Flash Size : 16MB
I (31) boot: ########
I (31) boot: ######## BOND-CORE ESP32 Bootloader
I (32) boot: ######## TARGET:  zermatt
I (33) boot: ######## VERSION: v2.4.18-trunk
I (33) boot: ######## BUILT:   Sun Feb 10 20:50:15 UTC 2019
I (34) boot: ########
I (35) boot: Partition Table:
I (35) boot: ## Label            Usage          Type ST Offset   Length
I (36) boot:  0 nvs              WiFi data        01 02 00009000 00004000
I (37) boot:  1 otadata          OTA data         01 00 0000d000 00002000
I (38) boot:  2 phy_init         RF data          01 01 0000f000 00001000
I (39) boot:  3 factory          factory app      00 00 00010000 002f0000
I (39) boot:  4 ota_0            OTA app          00 10 00300000 00400000
I (40) boot:  5 ota_1            OTA app          00 11 00700000 00400000
I (41) boot:  6 id               unknown          40 00 00b00000 00010000
I (42) boot:  7 db               unknown          40 00 00b10000 00400000
I (43) boot:  8 state            unknown          40 00 00f10000 000e0000
I (44) boot:  9 coredump         Unknown data     01 03 00ff0000 00010000
I (45) boot: End of partition table
I (46) boot: FACTORY_FIRST: disabled, using default esp behavior
I (46) boot: boot_index = 1
I (47) esp_image: segment 0: paddr=0x00700020 vaddr=0x3f400020 size=0x3ea34 (256564) map
I (138) esp_image: segment 1: paddr=0x0073ea5c vaddr=0x3ffb0000 size=0x015b4 (  5556) load
I (140) esp_image: segment 2: paddr=0x00740018 vaddr=0x400d0018 size=0xea90c (960780) map
0x400d0018: _flash_cache_start at ??:?

I (477) esp_image: segment 3: paddr=0x0082a92c vaddr=0x3ffb15b4 size=0x04298 ( 17048) load
I (484) esp_image: segment 4: paddr=0x0082ebcc vaddr=0x40080000 size=0x00400 (  1024) load
0x40080000: _WindowOverflow4 at /Users/cmerck/src/olibra/bond-core/bsp/esp-idf/components/freertos/xtensa_vectors.S:1779

I (485) esp_image: segment 5: paddr=0x0082efd4 vaddr=0x40080400 size=0x1a310 (107280) load
I (530) esp_image: segment 6: paddr=0x008492ec vaddr=0x400c0000 size=0x0009c (   156) load
I (546) boot: Loaded app from partition at offset 0x700000
I (546) boot: Disabling RNG early entropy source...
I (547) psram: This chip is ESP32-D0WD
Guru Meditation Error: Core  0 panic'ed (IllegalInstruction). Exception was unhandled.
Memory dump at 0x400d4074: 0000dff1 03106603 02fc2e1f
0x400d4074: esp_register_shutdown_handler at /Users/cmerck/src/olibra/bond-core/bsp/esp-idf/components/esp32/system_api.c:356

Core 0 register dump:
PC      : 0x400d4078  PS      : 0x00060930  A0      : 0x800d2a2f  A1      : 0x3ffe3b70
0x400d4078: esp_register_shutdown_handler at /Users/cmerck/src/olibra/bond-core/bsp/esp-idf/components/esp32/system_api.c:356

A2      : 0x00000001  A3      : 0x00000011  A4      : 0x3ffb0060  A5      : 0x3ffe3b98
A6      : 0x00000010  A7      : 0x00000000  A8      : 0x80083427  A9      : 0x00c86016
A10     : 0x3ffe3b9c  A11     : 0x40f02000  A12     : 0x00013ffc  A13     : 0x430f09f5
A14     : 0x430f49f6  A15     : 0x430fc9f4  SAR     : 0x00000017  EXCCAUSE: 0x00000000
EXCVADDR: 0x00000000  LBEG    : 0x40098794  LEND    : 0x4009879f  LCOUNT  : 0x00000000
0x40098794: _frxt_task_coproc_state at /Users/cmerck/src/olibra/bond-core/bsp/esp-idf/components/freertos/portasm.S:641

0x4009879f: _frxt_task_coproc_state at /Users/cmerck/src/olibra/bond-core/bsp/esp-idf/components/freertos/portasm.S:648


ELF file SHA256: 04efa869ce86d7bc5c4036c35dcff66a0f0c11b0d9deaff26b7918d06d1741d6

Backtrace: 0x400d4078:0x3ffe3b70 0x400d2a2c:0x3ffe3be0 0x400815cb:0x3ffe3c10 0x40079113:0x3ffe3c50 0x400791c5:0x3ffe3c80 0x400791e3:0x3ffe3cc0 0x400794d9:0x3ffe3ce0 0x40080522:0x3ffe3df0 0x40007c31:0x3ffe3eb0 0x4000073d:0x3ffe3f20
0x400d4078: esp_register_shutdown_handler at /Users/cmerck/src/olibra/bond-core/bsp/esp-idf/components/esp32/system_api.c:356

0x400d2a2c: esp_timer_impl_init at /Users/cmerck/src/olibra/bond-core/bsp/esp-idf/components/esp32/esp_timer_esp32.c:358 (discriminator 1)

0x400815cb: call_start_cpu0 at /Users/cmerck/src/olibra/bond-core/bsp/esp-idf/components/esp32/cpu_start.c:162


Rebooting...
Last edited by chrismerck on Thu Aug 22, 2019 5:10 pm, edited 1 time in total.

WiFive
Posts: 2624
Joined: Tue Dec 01, 2015 7:35 am

Re: bootloop using v3.2 bootloader with v3.3-rc app

Postby WiFive » Wed Aug 21, 2019 9:56 pm

https://github.com/espressif/esp-idf/issues/3865

Is bond 2 with esp32 shipping now or still mt7688 version?

ESP_Angus
Posts: 1795
Joined: Sun May 08, 2016 4:11 am

Re: bootloop using v3.2 bootloader with v3.3-rc app

Postby ESP_Angus » Thu Aug 22, 2019 1:09 am

Hi Chris,

Sorry for the inconvenience.

This regression (older bootloder + DIO mode + PSRAM can't boot) should be fixed in the latest release/v3.3 branch commit, so suggest checking out that branch and pulling the latest (a few commits have been pushed since v3.3-rc). It will be fixed in the final v3.3 release, also.


Angus

chrismerck
Posts: 47
Joined: Tue May 29, 2018 8:00 pm

Re: bootloop using v3.2 bootloader with v3.3-rc app

Postby chrismerck » Thu Aug 22, 2019 2:00 pm

Thanks Angus! So, was my mistake to use the tag v3.3-rc rather than the latest on the branch.

WiFive: see the beta forum post here: https://forum.bondhome.io/t/bond-v2-platform/466 The units with serials starting ZZ are ESP32-based.

WiFive
Posts: 2624
Joined: Tue Dec 01, 2015 7:35 am

Re: [SOLVED] bootloop using v3.2 bootloader with v3.3-rc app

Postby WiFive » Thu Aug 22, 2019 9:05 pm

You should sell bare board without firmware to use as esp32 universal IR/RF dev kit.

Who is online

Users browsing this forum: No registered users and 17 guests