Accurate Periodic ISR

[FishyFishy]

Hi, I've been looking into how to fire an ISR at a fixed rate (100Hz), with time synchronised to the PPS output of a GPS receiver. This is for a datalogger where the ISR will trigger sampling (eg read register of an I2C/SPI device).

I've considered using a hardware timer which supports periodic ISRs. The issue here is that the hardware timers are clocked by the APB clock which is likely to drift over time.

System time can be made more accurate by using an external RTC crystal, but there does not appear to be a way to use the RTC crystal to trigger ISRs (other than entering and exiting sleep mode repeatedly, which would complicate other operations). The only option here is to poll system time repeatedly.

Can anyone chime in if I've missed out any options here? I'm currently looking at a mildly complex solution involving manually correcting for the drift of a hardware timer.

Thanks

[ESP_Sprite]

I've considered using a hardware timer which supports periodic ISRs. The issue here is that the hardware timers are clocked by the APB clock which is likely to drift over time.

System time can be made more accurate by using an external RTC crystal

Note that the APB clock is based on the 40MHz crystal attached to the ESP32, so in theory it should give you more-or-less the same accuracy as an external RTC crystal.

[FishyFishy]

Right, thats logical. Looking at https://docs.espressif.com/projects/esp ... _time.html again, I realised that the different options for the RTC Clock Source are stated to affect stability rather than accuracy/drift.

Your comment and viewtopic.php?t=3715#p17038 appears to conflict though - were there changes after ESP_igrr's comment? The internal RTC clock having an frequency error of 5% seems extremely large if thats tied to the error of the 40MHz crystal.

[ESP_Sprite]

Your comment and viewtopic.php?t=3715#p17038 appears to conflict though - were there changes after ESP_igrr's comment? The internal RTC clock having an frequency error of 5% seems extremely large if thats tied to the error of the 40MHz crystal.

When in deep sleep, the internal RTC clock is not derived from the 40MHz crystal as the oscillator for that crystal is turned off. Instead, it uses an internal (non-regulated) oscillator, which is pretty inaccurate. If you're running an ISR, your chip by definition is not in deep sleep and timekeeping will use the 40MHz crystal.

[FishyFishy]

Thanks for the clarification!