ESP_Sprite wrote:Huh, you're right - seems I skipped over pin 7. Thanks for noticing, will fix it as soon as I have time. Same with the code/documentation discrepancy - those should match up, will see which one is wrong.
I can't easily check the code now, but my guess is that WP and HOLD aren't mentioned anywhere in the PSRAM code because they're already set up correctly for the SPI flash. On a flash chip, in the right mode (quad I/O) they *are* actually used as data pins; it's just that quad I/O is a relatively new development, and seemingly the chip manufacturers still only use the old pin names. (See e.g. here, last sentence of 7.3 on page 8.)
only for the protocol
please add GND pin too
ESP32 rev0 pSRAM - done!
sry - but i could not wait - now i have it manage by self.
we have events on june 6. and we want show on the education board the pSRAM
we are ready on one weekend - how long pycom have played? 1/2 year?
done on one weekend!
now its time to go few hours sleeping.