ESP32 Forum

nice news with 1.2 and 1.5 winbond's NOR Low Voltage Memories
Winbond’s New Low-Voltage NOR Flash Memories Designed Around ESP32 comes to the market in the form of a module as soon as possible.

we have then a new ESP32 that can regulate 1.2V and 1.5V from intern regulator? 1.8V ? and 3.3V ? or new Low Voltage ESP32?
how we work this out with pSRAM 1.8V or comes 1.2V and 1.5V other in 2018 ?

we was happy to find working 1.8V(3.3V) pSRAM and in 2018 we start again with searching and waiting?
we started allready in time with 1.8V ...

best wishes
rudi

why i can't find the xtensa-1.22.x-ext_ram_patch branch。
how can i get this.
tks!

It is in master branch now

WiFive wrote:It is in master branch now

So do I need to compile the xtensa toolchain on Windows for pSRAM support now?
Or it is already in xtensa-esp32-elf-win32-1.22.0-73-ge28a011-5.2.0.zip // esp32_win32_msys2_environment_and_toolchain-20170918.zip ?

How about esp-idf? Do I need to checkout the feature/psram_malloc branch now? Or I can already use pSRAM with master branch? (I can see SPI RAM option in menuconfig with master branch already).

You should be able to use all the (latest) vanilla toolchain and esp-idf branches to use psram. Support is in mainstream now, and the specific psram branches have been deprecated.

To all newbies out there (me included) testing pSRAM compatibility with their boards, here's what I did to get it working.

First of all make sure you're on the latest ESP-IDF verison. I'm on ESP-IDF v3.1-dev-380-gca3faa61 2nd stage bootloader as of testing this.

Second of all do you see SPI SRAM (sPRAM) tests being done during the startup sequence of the ESP32 like in the image bellow? If yes, then the problem might be within your code.
If no, it means that your start-up sequence output looks something like in the image bellow, with the SPI SRAM checks missing. If so, what I did to fix the problem was simply to go in the sdkconfig file in the root directory of your project, look for:
CONFIG_SPIRAM_SUPPORT=
and set it to:
CONFIG_SPIRAM_SUPPORT=y

For some reason, on my setup this feature was missing from make menuconfig. It only appeared after I've manually modified the sdkconfig file. Once configured in the sdkconfig file you should be able to see SPI RAM config options under make menuconfig ---> Component config ---> ESP32-specific ----> Support for external, SPI-connected RAM -----> SPI RAM config

The code that I've been using for testing the sPRAM can be found bellow under spram.rar
Fortunately it is stable at 80MHz flash and sPRAM

update
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for more details [ Datasheet ] see the ESP-PSRAM64 & ESP-PSRAM64H post

best wishes
rudi

Hopefully, 8 MB psRAM will be supported in esp-idf ...

loboris wrote:Hopefully, 8 MB psRAM will be supported in esp-idf ...

btw: did you note the update on modul [ordering info v1.7 from 2018.June]?
i think it is in the pipe and the HW is ready for MP ordering
ESP32-WROVER 64-Mbit PSRAM*
ESP32-WROVER-I 64-Mbit PSRAM*

best wishes
rudi

They probably aren't manufacturing the 32mbit for whatever optimization reasons. But it will be a bit difficult to use all 64mbit since it would be 32mbit per CPU unshared so any task using spiram would have to be pinned to the appropriate core and not share memory with tasks on the other core. The extra 32mbit could also be used as a data stash I guess.