Pulse Counter initialisation overrides GPIO pull mode

meowsqueak
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Joined: Thu Jun 15, 2017 4:54 am
Location: New Zealand

Pulse Counter initialisation overrides GPIO pull mode

Postby meowsqueak » Mon Sep 11, 2017 8:26 am

I'm working with the Pulse Counter and I ran into an interfacing problem. I'm using a voltage divider to precondition a weak 4.4V signal for 3.3V range and had planned to use the ESP32 GPIO in hi-impedance (floating) mode. However I observed with my oscilloscope that the GPIO I am using for a signal input to the Pulse Counter is set to internal pull-up, which isn't what I expected (and has the unfortunate effect of boosting the incoming signal by 3.3V - thankfully it was weak enough to avoid damage!). I disconnected the GPIO from the signal source and voltage divider and looked at it directly with the scope and confirmed that it's sitting up at ~3.3V.

I ran an experiment where I flashed a basic program that calls

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gpio_set_pull_mode(GPIO_NUM_4, GPIO_FLOATING)
or (separately)

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gpio_set_pull_mode(GPIO_NUM_4, GPIO_PULLDOWN_ONLY)
directly before calling

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pcnt_unit_config()
, and in both cases it seems that the GPIO mode is set correctly (voltage on pin falls to zero), but then is set to pull-up by pcnt_unit_config() regardless of the prior setting. The GPIO is configured as input-only.

Is this a known limitation with using the Pulse Counter on a GPIO or is there a bug here with regards to overwriting the pull mode?

I'm using ESP-IDF v2.1 with Version 1 silicon (DOIT ESP32-WROOM-32 board).

EDIT: I can set the pin mode to floating after the call to pcnt_unit_config() and that does seem to set the mode correctly, but this suggests that the PulseCounter initialisation is unnecessarily interfering with the GPIO pin mode - is there a need for it to default to pull-up? It does momentarily expose the GPIO to damage if the interfacing circuitry isn't clamped.

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