Enable PSRAM ESP32-S3-WROOM-1-N16R8

greg-dickson
Posts: 24
Joined: Sun Nov 01, 2020 1:51 am

Enable PSRAM ESP32-S3-WROOM-1-N16R8

Postby greg-dickson » Mon Nov 28, 2022 7:44 am

Could someone please tell me how to enable PSRAM on the
ESP32-S3-WROOM-1-N16R8

This is what I have so far

Code: Select all

#
# SPI RAM config
#
# CONFIG_SPIRAM_MODE_QUAD is not set
CONFIG_SPIRAM_MODE_OCT=y
CONFIG_SPIRAM_TYPE_AUTO=y
# CONFIG_SPIRAM_TYPE_ESPPSRAM64 is not set
CONFIG_SPIRAM_SIZE=-1

#
# PSRAM Clock and CS IO for ESP32S3
#
CONFIG_DEFAULT_PSRAM_CLK_IO=30
CONFIG_DEFAULT_PSRAM_CS_IO=26
# end of PSRAM Clock and CS IO for ESP32S3

# CONFIG_SPIRAM_FETCH_INSTRUCTIONS is not set
# CONFIG_SPIRAM_RODATA is not set
# CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY is not set
CONFIG_SPIRAM_SPEED_80M=y
# CONFIG_SPIRAM_SPEED_40M is not set
CONFIG_SPIRAM=y
CONFIG_SPIRAM_BOOT_INIT=y
# CONFIG_SPIRAM_IGNORE_NOTFOUND is not set
# CONFIG_SPIRAM_USE_MEMMAP is not set
# CONFIG_SPIRAM_USE_CAPS_ALLOC is not set
CONFIG_SPIRAM_USE_MALLOC=y
# CONFIG_SPIRAM_MEMTEST is not set
CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL=16384
# CONFIG_SPIRAM_TRY_ALLOCATE_WIFI_LWIP is not set
CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL=32768
# end of SPI RAM config
However I get no further than this.

Code: Select all

I (365) cpu_start: ESP-IDF:          v4.4.3
V (368) memory_layout: reserved range is 0x3c03b7f0 - 0x3c03b818
D (374) memory_layout: Checking 6 reserved memory ranges:
D (379) memory_layout: Reserved memory range 0x3d000000 - 0x3e000000
D (385) memory_layout: Reserved memory range 0x3fc84000 - 0x3fc93ee0
D (391) memory_layout: Reserved memory range 0x3fc93ee0 - 0x3fc98768
D (398) memory_layout: Reserved memory range 0x3fceee34 - 0x3fcf0000
D (404) memory_layout: Reserved memory range 0x40374000 - 0x40383ee0
0x40374000: _WindowOverflow4 at /mnt/240G/g/esp/esp-idf/components/freertos/port/xtensa/xtensa_vectors.S:1736

D (410) memory_layout: Reserved memory range 0x600fe000 - 0x600fe000
D (416) memory_layout: Building list of available memory regions:
V (422) memory_layout: Examining memory region 0x3d000000 - 0x3e000000
V (428) memory_layout: Region 0x3d000000 - 0x3e000000 inside of reserved 0x3d000000 - 0x3e000000
V (436) memory_layout: Examining memory region 0x40374000 - 0x40378000
0x40374000: _WindowOverflow4 at /mnt/240G/g/esp/esp-idf/components/freertos/port/xtensa/xtensa_vectors.S:1736

0x40378000: get_mmu_region at /mnt/240G/g/esp/esp-idf/components/spi_flash/flash_mmap.c:126

V (443) memory_layout: Region 0x40374000 - 0x40378000 inside of reserved 0x40374000 - 0x40383ee0
0x40374000: _WindowOverflow4 at /mnt/240G/g/esp/esp-idf/components/freertos/port/xtensa/xtensa_vectors.S:1736

0x40378000: get_mmu_region at /mnt/240G/g/esp/esp-idf/components/spi_flash/flash_mmap.c:126

0x40374000: _WindowOverflow4 at /mnt/240G/g/esp/esp-idf/components/freertos/port/xtensa/xtensa_vectors.S:1736

V (451) memory_layout: Examining memory region 0x3fc88000 - 0x3fc90000
V (457) memory_layout: Region 0x3fc88000 - 0x3fc90000 inside of reserved 0x3fc84000 - 0x3fc93ee0
V (466) memory_layout: Examining memory region 0x3fc90000 - 0x3fca0000
V (472) memory_layout: Start of region 0x3fc90000 - 0x3fca0000 overlaps reserved 0x3fc84000 - 0x3fc93ee0
V (481) memory_layout: Start of region 0x3fc93ee0 - 0x3fca0000 overlaps reserved 0x3fc93ee0 - 0x3fc98768
D (490) memory_layout: Available memory region 0x3fc98768 - 0x3fca0000
V (497) memory_layout: Examining memory region 0x3fca0000 - 0x3fcb0000
D (503) memory_layout: Available memory region 0x3fca0000 - 0x3fcb0000
V (509) memory_layout: Examining memory region 0x3fcb0000 - 0x3fcc0000
D (515) memory_layout: Available memory region 0x3fcb0000 - 0x3fcc0000
V (522) memory_layout: Examining memory region 0x3fcc0000 - 0x3fcd0000
D (528) memory_layout: Available memory region 0x3fcc0000 - 0x3fcd0000
V (534) memory_layout: Examining memory region 0x3fcd0000 - 0x3fce0000
D (540) memory_layout: Available memory region 0x3fcd0000 - 0x3fce0000
V (547) memory_layout: Examining memory region 0x3fce0000 - 0x3fce9710
D (553) memory_layout: Available memory region 0x3fce0000 - 0x3fce9710
V (559) memory_layout: Examining memory region 0x3fce9710 - 0x3fcf0000
V (565) memory_layout: End of region 0x3fce9710 - 0x3fcf0000 overlaps reserved 0x3fceee34 - 0x3fcf0000
D (575) memory_layout: Available memory region 0x3fce9710 - 0x3fceee34
V (581) memory_layout: Examining memory region 0x3fcf0000 - 0x3fcf8000
D (587) memory_layout: Available memory region 0x3fcf0000 - 0x3fcf8000
V (593) memory_layout: Examining memory region 0x600fe000 - 0x60100000
D (600) memory_layout: Available memory region 0x600fe000 - 0x60100000
I (606) heap_init: Initializing. RAM available for dynamic allocation:
D (612) heap_init: New heap initialised at 0x3fc98768
I (617) heap_init: At 3FC98768 len 00050FA8 (323 KiB): D/IRAM
I (622) heap_init: At 3FCE9710 len 00005724 (21 KiB): STACK/DRAM
D (628) heap_init: New heap initialised at 0x3fcf0000
I (633) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAM
D (638) heap_init: New heap initialised at 0x600fe000
I (643) heap_init: At 600FE000 len 00002000 (8 KiB): RTCRAM
I (648) spiram: Adding pool of 2048K of external SPI memory to heap allocator
device reports readiness to read but returned no data (device disconnected or multiple access on port?)
Waiting for the device to reconnect

chegewara
Posts: 2207
Joined: Wed Jun 14, 2017 9:00 pm

Re: Enable PSRAM ESP32-S3-WROOM-1-N16R8

Postby chegewara » Mon Nov 28, 2022 2:35 pm

spiram: Adding pool of 2048K of external SPI memory to heap allocator
For some reason SPIRAM is detected with size of 2MB. Please try to install this example and to see what is the real size of flash sn psram on this chip/module:
https://github.com/espressif/esp-idf/tr ... ello_world

greg-dickson
Posts: 24
Joined: Sun Nov 01, 2020 1:51 am

Re: Enable PSRAM ESP32-S3-WROOM-1-N16R8

Postby greg-dickson » Tue Nov 29, 2022 2:39 am

Ok I found the trick

The R8 s3 wroom (8MB PSRAM) use Octal SPI
This takes up gpio35 36 and 37

So if you have one of these don't connect those pins and ensure you choose Octal in the S3 PSRAM section

The R2 modules 2 MB PSRAM use Quad SPI

and the pins are available.

But ensure you choose QUAD SPI in the PSRAM section

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