I2S0 Clock (master clock) up to 80MHz derived from APLL clock

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ExtrasensoryNoob
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Joined: Mon Mar 21, 2022 1:25 pm

Re: I2S0 Clock (master clock) up to 80MHz derived from APLL clock

Postby ExtrasensoryNoob » Thu Apr 06, 2023 11:38 pm

My I2S audio project requires MCLK (specifically the Xmos XVF3610). I'd like to use my ESP32, which lead me to this topic. Is this still the way to go? Is it possible to get MCLK on GPIO2 rather than 0?

I've been using arduino-cli, so it seems I need to setup ESP IDF to try this. Is that right? Any chance there is a way to output MCLK using Arduino? Then I wouldn't need to redo all my existing code for TCP communication and other things. I'll do that if required though, as the alternative of switching to a different MCU is even more painful.

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ExtrasensoryNoob
Posts: 9
Joined: Mon Mar 21, 2022 1:25 pm

Re: I2S0 Clock (master clock) up to 80MHz derived from APLL clock

Postby ExtrasensoryNoob » Tue Apr 25, 2023 10:26 pm

Alright, I found it can be done with i2s_set_pin and works fine with the Arduino libraries. I'm not sure how the magic in this thread works, but i2s_set_pin is straightfoward. Example:

Code: Select all

#include <Arduino.h>
#include "driver/i2s.h"

void setup () {
   Serial.begin(115200);

   i2s_config_t i2s_config = {
      .mode = (i2s_mode_t)(I2S_MODE_MASTER | I2S_MODE_TX | I2S_MODE_RX),
      .sample_rate = 44100,
      .bits_per_sample = I2S_BITS_PER_SAMPLE_32BIT,
      .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
      .communication_format = I2S_COMM_FORMAT_STAND_MSB,
      .intr_alloc_flags = 0,
      .dma_buf_count = 6,
      .dma_buf_len = 512,
      .tx_desc_auto_clear = true
   };
   i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL);

   i2s_pin_config_t pin_config = {
      .mck_io_num = 3, // ESP32 pin 34, wESP32 net TX
      .bck_io_num = 26,
      .ws_io_num = 25,
      .data_out_num = 22,
      .data_in_num = 19
   };
   i2s_set_pin(I2S_NUM_0, &pin_config);

   Serial.println("Ready!");
}

void loop () {
   Serial.println("OK");
   delay(1000);
}
ESP32 supports MCLK on only GPIO pins 0, 1, or 3 so unfortunately I can't have it on 2. wESP32 exposes those pins on the J2 header, but IO0 is used for Ethernet PHY 50MHz and IO1 has R10K, but IO3 is usable and works fine. I lose serial transmit, but that's not a big deal for me. It may be harder to program via USB if you solder to J2, but OTA updates could be a workaround. I will plug my daughterboard into the wESP32's JP1 and also J2 headers, so I can have a passthrough for J2 to still access USB programming and have MCLK.

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jgustavoam
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Re: I2S0 Clock (master clock) up to 80MHz derived from APLL clock

Postby jgustavoam » Mon Jun 05, 2023 3:07 am

Hi Extra....

Some valuable information here about ESP32 Arduino I2S: (Github) https://github.com/espressif/arduino-esp32/tree/master

arduino-esp32/docs/source/api/i2s.rst
arduino-esp32/tools/sdk/esp32/include/driver/include/driver/i2s.h
arduino-esp32/libraries/I2S/src/I2S.h
Retired IBM Brasil
Electronic hobbyist since 1976.


suarezvictor
Posts: 1
Joined: Tue Jun 06, 2023 4:17 am

Re: I2S0 Clock (master clock) up to 80MHz derived from APLL clock

Postby suarezvictor » Tue Jun 06, 2023 4:19 am

This implement all logic to select where to output the I2S clock
https://github.com/espressif/esp-adf/bl ... nfig.c#L90

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