Enter/exit CAN reset mode

PeterR
Posts: 621
Joined: Mon Jun 04, 2018 2:47 pm

Re: Enter/exit CAN reset mode

Postby PeterR » Wed May 27, 2020 10:24 pm

Cool, past bed time, will be testing tommorrow :)
& I also believe that IDF CAN should be fixed.

PeterR
Posts: 621
Joined: Mon Jun 04, 2018 2:47 pm

Re: Enter/exit CAN reset mode

Postby PeterR » Thu May 28, 2020 11:00 am

I assume that the patch also contains the overrun fix?
Unfortunately this patch allows corrupt frames through using the described test pattern.

I can seed CAN frames & so dump registers on fault should that help you.
& I also believe that IDF CAN should be fixed.

ESP_Dazz
Posts: 308
Joined: Fri Jun 02, 2017 6:50 am

Re: Enter/exit CAN reset mode

Postby ESP_Dazz » Thu May 28, 2020 3:01 pm

PeterR wrote: I assume that the patch also contains the overrun fix?
Unfortunately this patch allows corrupt frames through using the described test pattern.

I can seed CAN frames & so dump registers on fault should that help you.
Yes, the new patch includes the overrun fix. The CAN frames and register dumps would help. Could you also provide a capture of the bit streams on the bus (i.e,. capture of the ESP32's RX pin). I need to know where in the frame the bus errors are occuring.

PeterR
Posts: 621
Joined: Mon Jun 04, 2018 2:47 pm

Re: Enter/exit CAN reset mode

Postby PeterR » Thu May 28, 2020 4:51 pm

Hi,
Missed this post, please ignore the PM other than dates.

Could you short cut me to the line at which the data frame is read from hardware?
Capturing bit stream at the ESP on product will take some work. Getting access will be a little scary. I could try jumping to an EVB.
The error may be induced just by connect/break on the termination resistor though.

EDIT: Also I would need to set up a GPIO trigger to find the error point. Dont have any free GPIO on product. I will need to setup an EVB then. Hopefully will be able to make a start on Monday.

POST: We decided to go with the patent 'duck tape/fudge/mask' approach FTM. Product is indication only & so ramping the data rate & checking data consistency is a more certain 'solution' albeit with some loss of performance. Arguably we do not even know if there is a software solution* & that colours approach - especially when so little time left & so much to do. Hopefully the ESP driver patch just needs a bit more work but if we are thinking to look at registers and bit streams then I think the grown ups might have read into this that this is a new unproven condition.
I will try & produce a MVWE on EVB as a back ground & hopefully get back on to this in a few weeks or (like if...) when I have an complete & acceptable application.
We will need to fix, this is just a question of immediate priorities.

* absence of repeatable test
& I also believe that IDF CAN should be fixed.

ESP_Dazz
Posts: 308
Joined: Fri Jun 02, 2017 6:50 am

Re: Enter/exit CAN reset mode

Postby ESP_Dazz » Mon Jun 01, 2020 2:20 pm

Please try this new patch. Added an extra test condition for Errata No.5
Attachments
errata_fix_new.zip
(12.96 KiB) Downloaded 397 times

PeterR
Posts: 621
Joined: Mon Jun 04, 2018 2:47 pm

Re: Enter/exit CAN reset mode

Postby PeterR » Tue Jun 02, 2020 2:54 pm

Thanks.
I think that the error rate has been reduced but this still fails.
I can get a fail within 30 seconds of fiddling with termination.
& I also believe that IDF CAN should be fixed.

PeterR
Posts: 621
Joined: Mon Jun 04, 2018 2:47 pm

Re: Enter/exit CAN reset mode

Postby PeterR » Wed Jun 03, 2020 10:59 pm

This issue has run in a few posts so I will summarise progress & especially for those thinking to use another CAN processor.

The patch coupled with the change below significantly reduces issue frequency - I have not seen an error yet. Statistically I see an order or two improvement ATM (no fails). I am working to produce an automated stress test so as to, err, stress the change.

DAZZ suggests that after his patch we should change line 170 of can_hal.c to read:

Code: Select all

if (seg == CAN_LL_ERR_SEG_DATA || seg == CAN_LL_ERR_SEG_CRC_SEQ || seg == CAN_LL_ERR_SEG_ACK_DELIM) {
This gives me a significant improvement in frame corruption immunity. Not seen one error yet. Will post when brute force test results are through.
Thanks Dazz!

PS I would add that as this is a silicon work around & so I cannot tell you that these changes are 100%. I can say that I achieve at least x2 OOM improvement (& no fails to date) using my test conditions though.
& I also believe that IDF CAN should be fixed.

jimhelios
Posts: 39
Joined: Sun Nov 10, 2019 2:35 pm

Re: Enter/exit CAN reset mode

Postby jimhelios » Thu Aug 27, 2020 9:50 pm

Sorry if its not appropriate to bump an old thread, but I'm having similar issues.

I'm suing an ole CAN driver, not from ESP-IDF. After a soft reset of my ESP32, the CAN controller would give bad data and this was fixed by resetting the CAN module as recommended earlier in this thread. However, the failure mode is that data would come through, but it would not be sensible data. I'm using Mongoose OS, which sits on an older version of ESP-IDF, but I can call ESP-IDF directly (as I have done with periph_module_reset(PERIPH_CAN_MODULE).

I'm trying to figure out if a frame or data is corrupted. Is there a way I can check the status of the controller?

Thanks...

Axel1400
Posts: 1
Joined: Thu Aug 20, 2020 12:13 am

Re: Enter/exit CAN reset mode

Postby Axel1400 » Sat Aug 29, 2020 6:35 am

I tried to implement the patch, but I can't, git gives me errors (attached an image), is there any way I can implement the patch?.
I'm using ESP-IDF in release 4.1
Image

PeterR
Posts: 621
Joined: Mon Jun 04, 2018 2:47 pm

Re: Enter/exit CAN reset mode

Postby PeterR » Tue Sep 01, 2020 10:21 am

Code: Select all

git checkout 84b51781c80740fda92784dafcfc96c13b0d8b66
Or you might have whitespace issues, cannot remember that command.
& I also believe that IDF CAN should be fixed.

Who is online

Users browsing this forum: No registered users and 111 guests