ESP32-S3 documentation

Kaisha
Posts: 42
Joined: Thu Mar 05, 2020 8:59 pm

ESP32-S3 documentation

Postby Kaisha » Fri Jun 11, 2021 4:18 pm

With ESP32-S3 supporting vector instructions (this sounds cool), is there any chance of getting official ISA/ASM and ROM documentation so we can actually utilize these new capabilities?

ESP_Sprite
Posts: 8921
Joined: Thu Nov 26, 2015 4:08 am

Re: ESP32-S3 documentation

Postby ESP_Sprite » Sat Jun 12, 2021 1:49 am

Yes, the extended instructions are scheduled to be documented in a TRM chapter.

Kaisha
Posts: 42
Joined: Thu Mar 05, 2020 8:59 pm

Re: ESP32-S3 documentation

Postby Kaisha » Sat Jun 12, 2021 3:40 am

So, you guys can now release official documentation for the full Xtensa LX7 ISA? That would be wonderful!!

Also, documentation on what is in the ROM, and Wifi, so we don't have to use RTOS/LWip if we choose not to!!

ESP_Sprite
Posts: 8921
Joined: Thu Nov 26, 2015 4:08 am

Re: ESP32-S3 documentation

Postby ESP_Sprite » Sat Jun 12, 2021 3:04 pm

Kaisha wrote:
Sat Jun 12, 2021 3:40 am
So, you guys can now release official documentation for the full Xtensa LX7 ISA? That would be wonderful!!
No, we cannot. Only the instructions we added ourselves (the vector instructions) are our property so we can release docs for those at will.
Also, documentation on what is in the ROM, and Wifi, so we don't have to use RTOS/LWip if we choose not to!!
I don't think the S3 will have a different policy there than the existing chips.

Kaisha
Posts: 42
Joined: Thu Mar 05, 2020 8:59 pm

Re: ESP32-S3 documentation

Postby Kaisha » Sun Jun 13, 2021 2:27 am

Thanks for the reply.

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