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ESP32-S3 documentation
Posted: Fri Jun 11, 2021 4:18 pm
by Kaisha
With ESP32-S3 supporting vector instructions (this sounds cool), is there any chance of getting official ISA/ASM and ROM documentation so we can actually utilize these new capabilities?
Re: ESP32-S3 documentation
Posted: Sat Jun 12, 2021 1:49 am
by ESP_Sprite
Yes, the extended instructions are scheduled to be documented in a TRM chapter.
Re: ESP32-S3 documentation
Posted: Sat Jun 12, 2021 3:40 am
by Kaisha
So, you guys can now release official documentation for the full Xtensa LX7 ISA? That would be wonderful!!
Also, documentation on what is in the ROM, and Wifi, so we don't have to use RTOS/LWip if we choose not to!!
Re: ESP32-S3 documentation
Posted: Sat Jun 12, 2021 3:04 pm
by ESP_Sprite
Kaisha wrote: ↑Sat Jun 12, 2021 3:40 am
So, you guys can now release official documentation for the full Xtensa LX7 ISA? That would be wonderful!!
No, we cannot. Only the instructions we added ourselves (the vector instructions) are our property so we can release docs for those at will.
Also, documentation on what is in the ROM, and Wifi, so we don't have to use RTOS/LWip if we choose not to!!
I don't think the S3 will have a different policy there than the existing chips.
Re: ESP32-S3 documentation
Posted: Sun Jun 13, 2021 2:27 am
by Kaisha
Thanks for the reply.