ESP32-D0WD Design Issue.

esp_zag0
Posts: 26
Joined: Sun Nov 18, 2018 6:33 pm

Re: ESP32-D0WD Design Issue.

Postby esp_zag0 » Wed Jan 26, 2022 4:41 pm

Design snippet with WP highlighted for reference:
Screenshot_1.png
Screenshot_1.png (124.57 KiB) Viewed 2836 times

ESP_Sprite
Posts: 8926
Joined: Thu Nov 26, 2015 4:08 am

Re: ESP32-D0WD Design Issue.

Postby ESP_Sprite » Thu Jan 27, 2022 6:52 am

In general, you want to make your SCK line a bit longer than others... if you expect it's a trace length issue, what you could do is lower your SPI flash speed from 80MHz to something lower (20MHz), if it works then, you're looking at a timing problem.

esp_zag0
Posts: 26
Joined: Sun Nov 18, 2018 6:33 pm

Re: ESP32-D0WD Design Issue.

Postby esp_zag0 » Fri Jan 28, 2022 1:29 am

ESP_Sprite wrote: In general, you want to make your SCK line a bit longer than others... if you expect it's a trace length issue, what you could do is lower your SPI flash speed from 80MHz to something lower (20MHz), if it works then, you're looking at a timing problem.
Hi ESP_Sprite!

I tried lowering the speed to 40 and 20 MHz but that didn't make any difference.

However, I tried using more of these flash chips and it turns out some of my conclusions were wrong:

When using Macronix MX25R3235FM2IH0 I can only get it to work in DIO, both for first and second stage bootloader.

But both Gigadevice GD25LQ32DSIGR or ISSI IS25WP032D-JBLE work fine when using QIO in 2nd stage bootloader and QOUT (or DIO) in first stage. If I flash with --flash_mode qio I get this:

Code: Select all

ets Jul 29 2019 12:21:46

rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:QIO, clock div:1
load:0x3fff0030,len:5560
load:0xffffffff,len:-1
Any idea why Macronix refuses to use anything other then DIO? And why can't I use QIO with GD and ISSI for 1st stage bootloader? Should I even bother with it, ie. what kind of improvement will I get from it?

QOUT+QIO log:

Code: Select all

ets Jul 29 2019 12:21:46

rst:0xc (SW_CPU_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:QOUT, clock div:1
load:0x3fff0030,len:5560
load:0x40078000,len:14432
load:0x40080400,len:4004
entry 0x40080644
I (81) cpu_start: Pro cpu up.
I (81) cpu_start: Starting app cpu, entry point is 0x40080f80
I (68) cpu_start: App cpu up.
I (207) cpu_start: Pro cpu start user code
I (207) cpu_start: cpu freq: 160000000
I (207) cpu_start: Application information:
I (210) cpu_start: Project name:     hello_world
I (215) cpu_start: App version:      1
I (220) cpu_start: Compile time:     Jan 27 2022 03:18:22
I (226) cpu_start: ELF file SHA256:  fce582be3b47d502...
I (232) cpu_start: ESP-IDF:          v4.4-beta1-284-gd83021a6e8-dirt
I (239) heap_init: Initializing. RAM available for dynamic allocation:
I (246) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM
I (252) heap_init: At 3FFB2AA8 len 0002D558 (181 KiB): DRAM
I (258) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM
I (265) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM
I (271) heap_init: At 4008ADF4 len 0001520C (84 KiB): IRAM
I (278) spi_flash: detected chip: issi
I (282) spi_flash: flash io: qio
I (287) cpu_start: Starting scheduler on PRO CPU.
I (0) cpu_start: Starting scheduler on APP CPU.
Hello world!

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