Here is what I read at https://docs.espressif.com/projects/esp ... aster.html:
ESP32-C3 integrates 3 SPI peripherals.
• SPI0 and SPI1 are used internally to access the ESP32-C3’s attached flash memory. Both controllers share the same SPI bus signals, and there is an arbiter to determine which can access the bus.
Currently, SPI Master driver does not support SPI1 bus.
• SPI2 is a general purpose SPI controller. It has an independent signal bus with the same name. The bus has 6 CS lines to drive up to 6 SPI slaves.
I have tested SPI write only for now (ESP-IDF, several tasks using xTaskCreate) and I was not able to make running SPI using any other SPI channel but 1. Only this seems to work for me:
Code: Select all
#define SPI_MOSI 6 #define SPI_MISO 5 #define SPI_SCLK 4 #define SPI_CS 7 #define SPI_N 1 … ret = spi_bus_initialize(SPI_N, &buscfg, SPI_DMA_CH_AUTO);
• Are there some limitations for ESP32-C3-DevKitM-1 regarding the number of SPI channels?
• I am considering for SPI other pins than defined above, like GPIO2, 3, 9, 10. Are there any limitations for these pins to be used for SPI?
• As I had tested "write only" SPI up to now, I'd like to ask whether there are any limitations/recommendations in SPI "receive" for ESP32-C3-DevKitM-1, e.g. half-duplex only, polling only etc.? I plan to connect INA229 to this devkit.
Thank you very much.