jrakus wrote: ↑Tue Dec 10, 2019 6:19 am
Is there a specific reason that you want to have a 64-bit processor for embedded stuff; why would a 32-bit one not be feasible?
I think that some guys don't catch the difference between embedded and "embedded", and would like to see ESP transforming into another RPi running full operating system. Anyway - if Espressif make such one-board computer (or maybe some kind of SoM), based on Risc-V architecture it will definitely shake the industry. But ESP32 in any version should be dedicated to bare-bone embedded systems, with constrains like supply, board space, I/O speed and ease of usage.
I think that next ESP32 chip shouldn't be a revolution. A little more peripherals (one more UART, one more I2C/I2S), little more RAM/Flash memory (+20%) and some improvements of existing ones (accurate ADC/DAC) will be fine. Version without on-board antenna (only RF pin) also will be interesting for very space constrained projects.
Can't state the same better than you. 64 bit in embedded, just a lot more gates for little benefit. Pretty much the only good reason is having "infinite" virtual memory — that will be good for extremely VM wasteful languages like Java, but that's "lazy programming."
Java is of course a trendy lang, but programming MCUs in anything, but C or C++ is really not taking off.
Having more FPUs would be good for languages that don't use integer math as such like Javascript, but again, this sound like throwing tenths of megagates for just like 1-2% more potential clientele for the company.
Vector extensions can also be though off for more DSP like functionality for voice synthesis/recognition, or doing something with video, but at 240mhz double cores it should be already be doable without increasing the gate count. Doing more "wider" computations with vector extensions, VLIW, or such will of course add performance for a small, linear increase in power consumption, but really for what?
Just seconding the thoughts that ESP32 in its current iteration with double 240mhz cores is a great overkill for the amount I/O it can drive. Either I/O options can be extended, and more thought put to them, or a more cost optimised version can be made with a single beefy core. The later, as I understood, was the S2 chip.