ESP_Sprite wrote: ↑Tue Apr 21, 2020 7:44 am
Baldhead wrote: ↑Mon Apr 20, 2020 5:51 pm
...
FYI, the ESP32S2 already has a fair few features you're mentioning: you can connect a flash and PSRAM chip to different SPI channels and map them both in memory simultaneously, support for DDR octal PSRAM, support for executing code in PSRAM. We also have 8-bit 'spi' which may or may not count as your configurable parallel port (if any, it's flexible enough).
Nice to know, thank's.
But why single core and not dual core ?
Why decrease static ram to 320KB instead of increasing ?
Why not increase the processor clock ?
See kendryte k210 specs, for example.
I think that adding 2 SQI DDR(internal/external bus) channels would be enough to save pins, but DDR octal PSRAM is nice too.
Suggestion:
* 1 channel SQI DDR for external psram memory with independent cache memory, independent cache controller, independent dma controller and maybe independent internal processor bus.
* 1 channel SQI DDR for external flash memory with independent cache memory, independent cache controller, independent dma controller and maybe independent internal processor bus.
The parallel port(in my case only 8 bits) it would be for communication with the display.
The i2s parallel module are very complicated to configure( many functions in one sigle module ).
If the espressif support didn't help me, i wouldn't be able to make it to work(some bugs in hardware too), and it still took me months.
I forgot to comment that esp32 does not have 8-bit transfer or 16-bit transfer ou 24-bit transfer in the i2s dma.
It only has 32-bit transfer, which, in my case, uses a lot of internal ram and also a lot of processing time and power ( copying from a 16 bits ram buffer to a 32-bits ram buffer) and i need to break 16 bits number into two 8 bits number and save each 8 bits number in a single 32 bits position ( 75% wasted memory ).
Dma linked list with only 12 bits for store the number of bytes to be transfered/received are very little.
I know that i can calculate n nodes in linked list but this are wasted processing power and time, and the developer(me), need time to develop this logic as efficiently as possible.
Why not using only one "big" node ?
Add a new single 32 bit field to dma structure(DW3) for example, and change the number of transfered/received bytes to 32 bits or 24 bits.
And please,
I am not a expert, but i will suggest the following, i dont know if it is possible.
DMA tranfers sizes:
Word size in bits: 8, 16, 24, 32, 64.
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viewtopic.php?f=13&t=12905&start=30"
Thank's.