I2S data corruption?

mgleason_3
Posts: 44
Joined: Mon Nov 07, 2016 5:04 pm

I2S data corruption?

Postby mgleason_3 » Sat Sep 30, 2017 4:24 am

Testing two ESP32's connected via I2S:
  1. Sender - Fills a buffer with 32-bit values. Then calls i2s_write_bytes to send the buffer over and over.
  2. Receiver - calls i2s_read_bytes to receive the data into buffers. Then prints the values it received.
For the initial test, the sender's buffer was filled with the 16 values from 0 to 15 (0, 1, 2, 3, 4, 5, 6, 7, 8, 9,10, 11, 12, 13, 14, 15).

The problem is the receiver is NOT receiving the same values all the time (e.g. 0, 2, 4, 7, 8, 9, 14, 15, 24, 25, 14, 11, 12, 13, 30, 15). A guesstimate would be that the full sequence is received correctly less than 40% of the time.

This post viewtopic.php?f=2&t=2772&p=14781 and others have mentioned a problem with "noise".

Now that this is set up, I'm glad to provide whatever data or run tests are needed - just ask! And feel free to let me know if you see something wrong.

The questions I'm wondering are:
  1. Is the problem of receiving incorrect values just an example of the "noise"?
  2. If so, what's causing it?

vibnwis
Posts: 89
Joined: Thu Aug 24, 2017 1:13 am

Re: I2S data corruption?

Postby vibnwis » Sat Sep 30, 2017 11:36 pm

My experience was, wires running 1000kHz SCL, i had bad connection, and failed most of the time. HOwever, after lowering it to 100k, everything is sweet.

mgleason_3
Posts: 44
Joined: Mon Nov 07, 2016 5:04 pm

Re: I2S data corruption?

Postby mgleason_3 » Sun Oct 01, 2017 5:13 am

Good suggestion.

I don't know of a way to directly control clock speed in I2S. My understanding is that the SCK/BCLK is the sum of: sampling rate * bits of precision * # of channels, e.g:
  • 44.1 kHz × 32 × 2 = 2.8224 MHz
So, set up some tests using 32-bits, 2-channels. The "Sender" transmitted values from 0-7. The receiver has a receive buffer for 1024 samples.

Running the first test at 44.1 kHz, the results were mixed - some of the samples were correct (0-7 repeating). But often the data looked like:
  • (senders data.): 0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7...
  • (data received): 0,1,2,3,4,4,6,6,0,2,4,7,8,9,14,15...
After comparing what was actually received to what should have been received, it turned out that of 1024 samples, the sample was correct 607 times and wrong 417 times.

Did a few more runs. Below's a list of the results at different sample rates (all at 32-bits, 2-channels):
  • Run__________# Correct___# Wrong
  • 1st @44100______607________417
  • 2nd @44100______586________438
  • 3rd @36000______416________608
  • 4th @8000_______140________884
  • 5th @48000______ 750________274
The results change with each run - the 1st and 2nd runs are at the same settings but produced different results. Strangely, the errors actually increased as the sample rates/frequency decreased. The 5th run used a higher frequency and returned better results.

One note: the largest value RECEIVED so far is 15.

Will run a few more tomorrow.

vibnwis
Posts: 89
Joined: Thu Aug 24, 2017 1:13 am

Re: I2S data corruption?

Postby vibnwis » Sun Oct 01, 2017 10:16 pm

Oops! my bad, I did not read it properly. Your issue was about I2S, however, I was answering with I2C in mind. Please ignore my answer.

mgleason_3
Posts: 44
Joined: Mon Nov 07, 2016 5:04 pm

Re: I2S data corruption?

Postby mgleason_3 » Mon Oct 02, 2017 9:20 pm

For these tests the master and slave where swapped - so the sender is the master (I2S_MODE_MASTER) and the receiver is the slave. Everything else is the same as with the prior tests:
  • Run__________# Correct___# Wrong
  • 1st @48000______ 1009________11
  • 2nd @44100______876________128
  • 3rd @8000_______1010________8
Noted a couple things:
  1. The tests showed a few samples with very large negative numbers (e.g. -2147483645, -2147483646). e.g.:
    1. Should have received: ...5,6,7,0,1,2,3,4___________, 5,6,7,0,1,2,3...
    2. ____ Actually received:...5,6,7,0,1,2,2,-2147483645,3,___ 0,1,2,3...
      Should have received: ...5,6,7,0,1,2___________ ,3,4,5,6,7,0,1,2,3...
    3. ____ Actually received:...5,6,7,0,0,-2147483646,0,6,15,__ 0,1,2,3...
  2. When the very large negative samples where received,
    1. The sample before is incorrect
    2. looks like two (2) samples where dropped/missed/lost
BTW, assuming the data is represented in 2's compliment:
  • -2147483646 is 10000000000000000000000000000010 in binary
    • and if you revert the leading 1 to 0, you get 00000000000000000000000000000010 which is 2
  • -214748364 5 10000000000000000000000000000011
    • again reverting the leading 1 to 0, you get 00000000000000000000000000000011 is 3
So, maybe some bits are being lost and others combined with adjacent samples?

mgleason_3
Posts: 44
Joined: Mon Nov 07, 2016 5:04 pm

Re: I2S data corruption?

Postby mgleason_3 » Thu Oct 05, 2017 7:58 pm

Question for the Espressif team:

If you set .bits_per_sample to 24-bits, how is the data aligned in the returned buffer? is it padded out to 32-bits?

jsurfage
Posts: 5
Joined: Sat Oct 07, 2017 6:05 pm

Re: I2S data corruption?

Postby jsurfage » Sat Oct 07, 2017 6:14 pm

Espressif?

Just wondering if I can get answers to the questions I've already raised...
  1. Is the problem of receiving incorrect values just an example of the "noise"?
  2. If so, what's causing it?
  3. If you set .bits_per_sample to 24-bits, how is the data aligned in the returned buffer? is it padded out to 32-bits?
Maybe the real question is: Is the I2S module in the ESP32 is simply defective?

ESP_Sprite
Posts: 4241
Joined: Thu Nov 26, 2015 4:08 am

Re: I2S data corruption?

Postby ESP_Sprite » Sun Oct 08, 2017 10:15 am

Please keep in mind this is the last day of a Chinese week-long holiday. I'll see if I can dig up some answers on monday.

jsurfage
Posts: 5
Joined: Sat Oct 07, 2017 6:05 pm

Re: I2S data corruption?

Postby jsurfage » Wed Oct 18, 2017 8:29 pm

Hey ESP_Sprite - where you able to get the answers?

jsurfage
Posts: 5
Joined: Sat Oct 07, 2017 6:05 pm

Re: I2S data corruption?

Postby jsurfage » Mon Oct 23, 2017 5:30 am

Ping.

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