SDIO Interface

ESP_Angus
Posts: 568
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Re: SDIO Interface

Postby ESP_Angus » Fri Jan 13, 2017 5:00 am

Hi Espagnole,

Looks like you mentioned this on github as well, and ESP_igrr has replied to you there:
https://github.com/espressif/esp-idf/issues/227

Angus

novalight
Posts: 23
Joined: Tue Apr 19, 2016 1:13 pm

Re: SDIO Interface

Postby novalight » Fri Jan 13, 2017 7:39 am

Has anybody an indication an what could be tested if just the 4-bit mode fails while 1-bit works?
Is there something I can learn from the error messages? Can I measure something?

For reference again, this was the error message:

Code: Select all

I (3487) example: Try mount sd card
E (3507) sdmmc_cmd: sdmmc_read_sectors: sdmmc_send_cmd returned 0x109
E (3507) ff_diskio: sdmmc_read_blocks failed (265)
W (3507) vfs_fat_sdmmc: failed to mount card (1)
E (3517) example: Failed to mount filesystem. If you want the card to be formatted, set format_if_mount_failed = true.

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rudi ;-)
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Joined: Fri Nov 13, 2015 3:25 pm

Re: SDIO Interface

Postby rudi ;-) » Fri Jan 13, 2017 11:16 am

novalight wrote:Has anybody an indication an what could be tested if just the 4-bit mode fails while 1-bit works?
Is there something I can learn from the error messages? Can I measure something?

For reference again, this was the error message:

Code: Select all

I (3487) example: Try mount sd card
E (3507) sdmmc_cmd: sdmmc_read_sectors: sdmmc_send_cmd returned 0x109
E (3507) ff_diskio: sdmmc_read_blocks failed (265)
W (3507) vfs_fat_sdmmc: failed to mount card (1)
E (3517) example: Failed to mount filesystem. If you want the card to be formatted, set format_if_mount_failed = true.


hi

RTFT wrote:
0x109 is ESP_ERR_INVALID_CRC, and send_scr is the first transaction which uses D0 line (all the previous ones use only CMD and CLK). Suggest checking what happens on D0 line (that's GPIO2) using an oscilloscope. You may be missing a pull up resistor on this line,
or you may have both a pull down resistor and a pull up one .

Note that flashing the ESP with a pull up resistor attached to GPIO2 will not work, because GPIO2 needs to be low when going into the bootloader mode. One solution is to connect GPIO2 and GPIO0 with a jumper — this will pull down GPIO2 along with GPIO0 during programming



check your GPIO_ pullup/pulldown on the pin in software too!
there must be wrong setting in your code.

best wishes
rudi ;-)
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novalight
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Joined: Tue Apr 19, 2016 1:13 pm

Re: SDIO Interface

Postby novalight » Fri Jan 13, 2017 2:10 pm

I've checked the pullups and added hardware pullups to IO_2 and IO_12 but still no success in 4-Bit mode.
Since it works in 1-Bit mode I assume DATA0 to be okay. So the question is: why would I only get this error in 4-Bit-Mode?

Espagnole
Posts: 10
Joined: Mon Dec 19, 2016 10:18 am

Re: SDIO Interface

Postby Espagnole » Fri Jan 13, 2017 8:20 pm

Indeed, adding pullup resistors solved the problem.
However my question is why pullups resistors are needed at all: each SD card has internal pullup approx. 47k and we have internal pullup that are possible to turn on. Whats more, pull up mustn't be inserted on DATA2 (GPIO12) because spi flash voltage and DATA0 (GPIO2) results in problem while flashing. Problems only;
Had tests showed some real advantage of adding external resistors for final device releases?

novalight : check resistance between processor (module) and card socket. I believe some pin is just not connected.

ESP_igrr
Posts: 847
Joined: Tue Dec 01, 2015 8:37 am

Re: SDIO Interface

Postby ESP_igrr » Sat Jan 14, 2017 7:31 am

novalight: can you capture the failing transfer using a logic analyzer?

Espagnole: gpio2 and gpio12 must be at high logic level when neither card nor host is driving these lines. This is part of the SD spec. You can avoid problems with flashing by pulling gpio0 low in the same way gpio0 is pulled low when flashing. Regarding gpio12, you can program efuses to select correct flash voltage, then gpio12 will not be used as a bootstrapping pin — this is actually the preferred approach.

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rudi ;-)
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Re: SDIO Interface

Postby rudi ;-) » Sat Jan 14, 2017 1:55 pm

ESP_igrr wrote:novalight: can you capture the failing transfer using a logic analyzer?


@novalight
and if possible, can you say, how and with which components you have build the test.
examples.jpg
examples.jpg (168.82 KiB) Viewed 1840 times

do you have a bare sdhc socket
Image
on a bare esp32 or do you use a esp32 board ( which ) and a sd(hc) card component ( see pictures ) or like this selfmades ( parts from my own esp8266 sdhc test).



best wishes
rudi ;-)
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IMG_4090.jpg (228.53 KiB) Viewed 1840 times
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sintech
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Joined: Wed Dec 14, 2016 2:54 pm

Re: SDIO Interface

Postby sintech » Sat Jan 14, 2017 3:17 pm

I'm able to run an example in 4-bit mode only after:
1. disconnecting GPIO12 from SD-card shield (with soldered pull-ups) (to not interfere with internal pull-down signaling of LDO voltage)
2. addling 5 second delay at the beginning of my code
3. reconnecting GPIO12 to SD CARD D2 during this delay.

Speaking about LDO voltage. I have measured voltage on bare GPIO12 pin and it is 0V. So according to page 9 of ESP32 datasheet I made an assumption that internal flash on my module is 3.3V. But in sd_card example readme file I found an opposite information "For boards which use 1.8V flash chip, GPIO12 needs to be low at reset.". So what is true?
And please share with us commands how to set efuses for SDIO_TIEH=0 and SDIO_FORCE=1, because (if I understand correctly) this settings are permanent and can't be changed back.

I have also made some benchmarking (using a code from test_sd.c) and here are the results:

Code: Select all

Type: SDHC/SDXC
Speed: default speed
Size: 14991MB
CSD: ver=1, sector_size=512, capacity=30702592 read_bl_len=9
SCR: sd_spec=2, bus_width=5
# 4-bit mode
  sector  | count | size(kB) | wr_time(ms) | wr_speed(MB/s) | rd_time(ms) | rd_speed(MB/s)
        0 |    1  |    0.5   |    22.21    |      0.02      |    0.33s    |     1.49
        0 |    4  |    2.0   |    22.79    |      0.09      |    0.58s    |     3.39
        1 |   16  |    8.0   |    22.87    |      0.34      |    1.17s    |     6.71
       16 |   32  |   16.0   |    27.29    |      0.57      |    2.05s    |     7.63
       48 |   64  |   32.0   |    16.42    |      1.90      |    3.74s    |     8.35
      128 |  128  |   64.0   |     8.69    |      7.19      |    7.10s    |     8.80
     1024 |  256  |   128.0  |    16.18    |      7.72      |    13.88s   |     9.00

# 1-bit mode
  sector  | count | size(kB) | wr_time(ms) | wr_speed(MB/s) | rd_time(ms) | rd_speed(MB/s)
        0 |    1  |    0.5   |    22.91    |      0.02      |    0.48s    |     1.01
        0 |    4  |    2.0   |    26.14    |      0.07      |    1.20s    |     1.62
        1 |   16  |    8.0   |    25.84    |      0.30      |    3.67s    |     2.13
       16 |   32  |   16.0   |    41.25    |      0.38      |    7.00s    |     2.23
       48 |   64  |   32.0   |    25.09    |      1.25      |    13.58s   |     2.30
      128 |  128  |   64.0   |    27.23    |      2.29      |    26.76s   |     2.34
     1024 |  256  |   128.0  |    53.78    |      2.32      |    53.19s   |     2.35

ESP_igrr
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Re: SDIO Interface

Postby ESP_igrr » Sat Jan 14, 2017 3:52 pm

sintech wrote:So according to page 9 of ESP32 datasheet I made an assumption that internal flash on my module is 3.3V. But in sd_card example readme file I found an opposite information "For boards which use 1.8V flash chip, GPIO12 needs to be low at reset.". So what is true?


The readme file is wrong here. Thanks for reporting this.

Commands to set flash voltage to 3.3v are as follows:

Code: Select all

# override control of SDIO regulator — use efuses
components/esptool_py/esptool/espefuse.py burn_efuse XPD_SDIO_FORCE
# set 3.3v output voltage
components/esptool_py/esptool/espefuse.py burn_efuse XPD_SDIO_TIEH
# enable SDIO regulator at reset
components/esptool_py/esptool/espefuse.py burn_efuse XPD_SDIO_REG


(you may also need to set ESPPORT environment variable or add a "-p /dev/tty.x" argument)

sintech
Posts: 25
Joined: Wed Dec 14, 2016 2:54 pm

Re: SDIO Interface

Postby sintech » Sat Jan 14, 2017 4:54 pm

Thanks a lot ESP_igrr, now 4-bit mode works even without disconnecting gpio12 pin.

Code: Select all

Config fuses:
XPD_SDIO_FORCE         Ignore MTDI pin (GPIO12) for VDD_SDIO on reset    = 1 R/W (0x1)
XPD_SDIO_REG           If XPD_SDIO_FORCE, enable VDD_SDIO reg on reset   = 1 R/W (0x1)
XPD_SDIO_TIEH          If XPD_SDIO_FORCE & XPD_SDIO_REG, 1=3.3V 0=1.8V   = 1 R/W (0x1)

But I should mention that "espefuse.py burn_efuse" command works only on mac os for me.
In windows msys environment I was only able to display current settings using "summary" command.
But if I run "espefuse.py -p com14 burn_efuse XPD_SDIO_TIEH 1" it hang until interrupted by ctrl+c.

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