编译Micropython的时候发现有两个头文件中定义的内容冲突了,该怎么解决?

Mars.CN
Posts: 19
Joined: Tue Jan 11, 2022 1:36 am

编译Micropython的时候发现有两个头文件中定义的内容冲突了,该怎么解决?

Postby Mars.CN » Wed Jan 26, 2022 9:29 am

刚入手的S3开发板,想装一个Micropython,从官网下载的源码编译的时候出现问题

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In file included from /home/mars/esp/esp-idf_4_4/components/esp_hw_support/include/soc/spinlock.h:11,
                 from /home/mars/esp/esp-idf_4_4/components/freertos/port/xtensa/include/freertos/portmacro.h:42,
                 from /home/mars/esp/esp-idf_4_4/components/freertos/include/freertos/portable.h:51,
                 from /home/mars/esp/esp-idf_4_4/components/freertos/include/freertos/FreeRTOS.h:63,
                 from /home/mars/esp/micropython-1.18/ports/esp32/mpconfigport.h:10,
                 from /home/mars/esp/micropython-1.18/py/mpconfig.h:62,
                 from /home/mars/esp/micropython-1.18/py/mpstate.h:31,
                 from /home/mars/esp/micropython-1.18/py/runtime.h:29,
                 from /home/mars/esp/micropython-1.18/extmod/nimble/modbluetooth_nimble.c:28:
/home/mars/esp/esp-idf_4_4/components/soc/esp32s3/include/soc/cpu.h:27: warning: "WSR" redefined
 #define WSR(reg, newval)  asm volatile ("wsr %0, " #reg : : "r" (newval));
 
In file included from /home/mars/esp/esp-idf_4_4/components/freertos/port/xtensa/include/freertos/portmacro.h:41,
                 from /home/mars/esp/esp-idf_4_4/components/freertos/include/freertos/portable.h:51,
                 from /home/mars/esp/esp-idf_4_4/components/freertos/include/freertos/FreeRTOS.h:63,
                 from /home/mars/esp/micropython-1.18/ports/esp32/mpconfigport.h:10,
                 from /home/mars/esp/micropython-1.18/py/mpconfig.h:62,
                 from /home/mars/esp/micropython-1.18/py/mpstate.h:31,
                 from /home/mars/esp/micropython-1.18/py/runtime.h:29,
                 from /home/mars/esp/micropython-1.18/extmod/nimble/modbluetooth_nimble.c:28:
/home/mars/esp/esp-idf_4_4/components/xtensa/include/xt_instr_macros.h:18: note: this is the location of the previous definition
 #define WSR(reg, at)         asm volatile ("wsr %0, %1" : : "r" (at), "i" (reg))
报了一堆这样的错误,我看了两个文件,里面定义的内容确实有冲突,这个应该如何解决??
components/soc/esp32s3/include/soc/cpu.h

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/* C macros for xtensa special register read/write/exchange */

#define RSR(reg, curval)  asm volatile ("rsr %0, " #reg : "=r" (curval));
#define WSR(reg, newval)  asm volatile ("wsr %0, " #reg : : "r" (newval));
#define XSR(reg, swapval) asm volatile ("xsr %0, " #reg : "+r" (swapval));
components/xtensa/include/xt_instr_macros.h:

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#define RSR(reg, at)         asm volatile ("rsr %0, %1" : "=r" (at) : "i" (reg))
#define WSR(reg, at)         asm volatile ("wsr %0, %1" : : "r" (at), "i" (reg))
#define XSR(reg, at)         asm volatile ("xsr %0, %1" : "+r" (at) : "i" (reg))

#define RER(reg, at)         asm volatile ("rer %0, %1" : "=r" (at) : "r" (reg))

#define WITLB(at, as)        asm volatile ("witlb  %0, %1; \n isync \n " : : "r" (at), "r" (as))
#define WDTLB(at, as)        asm volatile ("wdtlb  %0, %1; \n dsync \n " : : "r" (at), "r" (as))
关键是两个里面的内容还不一样,该用哪个?

ESP_morris
Posts: 254
Joined: Wed Sep 05, 2018 6:23 am

Re: 编译Micropython的时候发现有两个头文件中定义的内容冲突了,该怎么解决?

Postby ESP_morris » Fri Jan 28, 2022 3:13 am

感谢反馈,请以 xt_instr_macros 中的为准,我们近期会去修复这个重复定义的问题.

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