That's a new one by me, I hadn't seen failing to boot in DIO mode before!
All the SPI Flash manufacturers call the following things by slightly different names. I'm going to use Gigadevice's command names in this post because they map well to the Espressif names. However your SPI Flash chip's datasheet may use different names. The command hex codes should be the same, though.
Not all chips support all of these modes. The datasheet is the best source to know what supports what.
- DIO - SPI host uses the "Dual I/O Fast Read" command (BBh). Two SPI pins are used to write the flash address part of the command, and to read flash data out. Therefore these phases need half the clock cycles compared to standard SPI.
- DOUT - SPI host uses the "Dual Output Fast Read" command (3Bh). Two SPI pins are used to read flash data out. Slightly slower than DIO, because the address is written via the single MOSI data pin.
- QIO - SPI host uses the "Quad I/O Fast Read" command (EBh). Four SPI pins are used to write the flash address part of the command, and to read flash data out. Therefore these phases need a quarter the clock cycles compared to standard SPI.
- QOUT - SPI host uses the "Quad Output Fast Read" command (6Bh). Four SPI pins are used to read the flash data out. Slightly slower than QIO, because the address is written via the single MOSI data pin.
In terms of performance: QIO > QOUT > DIO > DOUT. I'm fairly sure the flash cache issues 32 byte reads each time, so QOUT or QIO are substantially faster than DIO or DOUT.
However, because the command itself (and the read status command) are sent using standard SPI, doubling the SPI clock speed is a bigger speed boost than switching from DOUT to QIO.
ESP-IDF defaults to DIO because some flash chips use a mode bit to enable QIO & QOUT support, and this can vary between manufacturers. The chips used in ESP-WROOM modules do not enable QIO correctly without an additional command. A modification is pending in esp-idf which will use the Flash ID to determine which initialisation sequence should be used to enable QIO or QOUT mode.
What flash chip do you have? I'm guessing it's a chip which only supports DOUT/QOUT in its command set, not QIO/DIO.
If using DIO/DOUT mode, GPIOs 9 & 10 are available for other uses. However note that if they are wired to the SPI flash chip (as they are in WROOM, for example) then the SPI flash chip may use them for other pin functions. Consult the SPI flash chip data sheet to be sure.