ESP-IDF, multicore & freeRTOS confusion

yaqwsx
Posts: 5
Joined: Sun Feb 26, 2017 9:05 am

ESP-IDF, multicore & freeRTOS confusion

Postby yaqwsx » Sun Feb 26, 2017 9:22 am

I am completely new to ESP32 development and I am still looking around.

To sum up my assumptions about ESP32 I make, when asking this question:
- ESP32 contains two identical cores, one is PRO_CPU and the second is APP_CPU.
- ESP-IDF is build on top FreeRTOS. That means that handling of WiFi and other stuff is handled as RTOS task.
- ESP-IDF is the lowest-possible API officially supported

My confusion is about details concerning the two cores.
- Which peripheral (timer) is freeRTOS using to implement scheduler? Or does it support only cooperative multitasking?
- Does it utilize both cores? If so, what is the scheduling algorithm?
- Is it possible to use ESP-IDF without RTOS? E.g. I want statically to allocate one job on one CPU (doing background stuff, handling WiFi, etc.) and run another job on the second one?
- Is it possible to run FreeRTOS on one CPU and dedicate the second core to a single job? If so, how to achieve it?
- How to use sleep modes? Is it possible to use sleep modes per-cpu?

ESP_igrr
Posts: 2067
Joined: Tue Dec 01, 2015 8:37 am

Re: ESP-IDF, multicore & freeRTOS confusion

Postby ESP_igrr » Sun Feb 26, 2017 2:06 pm

- Which peripheral (timer) is freeRTOS using to implement scheduler? Or does it support only cooperative multitasking?
FreeRTOS is currently configured to use one of the timers built into the CPU core (CCOMPARE0).
- Does it utilize both cores? If so, what is the scheduling algorithm?
It uses both cores unless "Run FreeRTOS on first core only" option is set in menuconfig.
- Is it possible to use ESP-IDF without RTOS? E.g. I want statically to allocate one job on one CPU (doing background stuff, handling WiFi, etc.) and run another job on the second one?
In theory, yes. Application entry points on both CPUs (start_cpu0 and start_cpu1) are weak functions. As such, you can roll your own solution if you like. However some useful parts of ESP-IDF (drivers and libraries, including the C standard library) are written or configured to use FreeRTOS synchronisation and locking primitives. E.g. `printf` will eventually obtain a FreeRTOS mutex before accessing the UART peripheral.

On each core, the scheduler runs a task with highest priority which is not blocked on a synchronization primitive, and is allowed to run on a particular core. When creating a task using xTaskCreatePinnedToCore function, you can specify whether the task is allowed to run on a specific core (pinned to it) or not. IIRC at least some of the system tasks (the LwIP task is one of them) are created without affinity. Most tasks are pinned to CPU0. If you find this problematic (and want to ensure that all system tasks are on CPU0, to run your own code on CPU1 exclusively), let us know, we may add a menuconfig option to configure the affinity for wifi/bt stack tasks.
- Is it possible to run FreeRTOS on one CPU and dedicate the second core to a single job? If so, how to achieve it?
This is possible, but depending on what you are trying to do, it may be easier to run FreeRTOS on both cores, and run your code which needs to run on CPU1 in a task.
See discussion here: https://esp32.com/viewtopic.php?f=2&t=764
- How to use sleep modes? Is it possible to use sleep modes per-cpu?
Currently three sleep-related features in ESP-IDF:
- FreeRTOS idle task will use 'waiti' instruction to put the CPU into somewhat lower power mode until an interrupt occurs. This happens on both cores independently, and can not be configured.
- WiFi driver has "modem sleep" feature which powers down parts of radio and baseband between transmit/receive events. This feature is not related to CPUs.
- Deep sleep mode powers down the digital part of the chip; only RTC peripherals, ULP coprocessor, and RTC memories may be powered on in this mode. This is a SoC-level feature, and both CPUs, IRAM, DRAM will be powered off.

There will be more sleep-related features in the next version of ESP-IDF, in particular dynamic frequency switching and light sleep. Both of these features are also SoC-level, and can not be used for one specific CPU.

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