error message ledc_isr_register()

user4_esp32
Posts: 21
Joined: Sun Nov 26, 2017 4:48 pm

Re: error message ledc_isr_register()

Postby user4_esp32 » Sat Dec 02, 2017 2:02 pm

I think I figured it out:

Enable the Overflow interrupt:

Code: Select all

	
	// add ledc isr register function
	ESP_ERROR_CHECK( ledc_isr_register(ledc_timer_overflow_isr, NULL, ESP_INTR_FLAG_IRAM , NULL));
	
	// Enable timer overflow interrupt Register 13.17: LEDC_INT_ENA_REG (0x0188)
	/* description: The interrupt enable bit for high speed channel0  counter overflow interrupt.*/
	//  #define LEDC_HSTIMER0_OVF_INT_ENA  (BIT(0))
	WRITE_PERI_REG(LEDC_INT_ENA_REG, 0x1);
	
The Interrupt Service Routine:

Code: Select all

void IRAM_ATTR ledc_timer_overflow_isr(void *arg){
	// Clear interrupt bit
	// Register 13.18: LEDC_INT_CLR_REG (0x018C
	/*description: Set this  bit to clear  high speed channel0  counter overflow interrupt.*/
	WRITE_PERI_REG(LEDC_INT_CLR_REG, 0x1);

	// run your own interrupt code here
}	

afaber
Posts: 1
Joined: Thu Jan 07, 2016 3:39 pm

Re: error message ledc_isr_register()

Postby afaber » Wed Mar 07, 2018 2:22 pm

thanks for the example code, I was looking for some example code to catch the ledc timer overflow interrupt

ziolelle
Posts: 6
Joined: Tue Apr 17, 2018 1:40 pm

Re: error message ledc_isr_register()

Postby ziolelle » Tue Apr 17, 2018 1:48 pm

I tried to follow the sample in order to use "ledc_isr_register" but unsuccessfully,
the retcode for the function gives me back 0x105 (ESP_ERR_NOT_FOUND) it seems something is wrong when trying to find an available spot to install the function

my code:

Code: Select all

#include <stdio.h>
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "freertos/queue.h"
#include "driver/ledc.h"
#include "esp_err.h"

#define LEDC_HS_TIMER          LEDC_TIMER_0
#define LEDC_HS_MODE           LEDC_HIGH_SPEED_MODE

#define LEDC_HS_CH0_GPIO       (2)
#define LEDC_HS_CH0_CHANNEL    LEDC_CHANNEL_0

#define LEDC_TEST_CH_NUM       (1)
#define LEDC_TEST_DUTY         (4000)
#define LEDC_TEST_FADE_TIME    (1000)

QueueHandle_t xQueue = NULL;

ledc_timer_config_t ledc_timer = {
	.duty_resolution = LEDC_TIMER_13_BIT, // resolution of PWM duty
	.freq_hz = 5000,                      // frequency of PWM signal
	.speed_mode = LEDC_HS_MODE,           // timer mode
	.timer_num = LEDC_HS_TIMER            // timer index
};

ledc_channel_config_t ledc_channel = {
	.channel    = LEDC_HS_CH0_CHANNEL,
	.duty       = 0,
	.gpio_num   = LEDC_HS_CH0_GPIO,
	.speed_mode = LEDC_HS_MODE,
	.intr_type  = LEDC_INTR_FADE_END,
	.timer_sel  = LEDC_HS_TIMER
};


void IRAM_ATTR ledc_isr_routine(void *param) {
	BaseType_t xHigherPriorityTaskWoken;
	static uint32_t counter = 0;
	
	printf("*** ledc_isr ***\n");
	xQueueSendFromISR(xQueue, &counter, &xHigherPriorityTaskWoken);
}


void app_main()
{
	xQueue = xQueueCreate(5, sizeof(uint32_t));
	
    // Set configuration of timer0 for high speed channels
	printf("config timer\n");
    ledc_timer_config(&ledc_timer);

    // Set LED Controller with previously prepared configuration
	printf("config channel\n");
	ledc_channel_config(&ledc_channel);

    // Initialize fade service.
	printf("func install\n");
    ledc_fade_func_install(0);

	// enable ISR routine
	esp_err_t ret = ledc_isr_register(ledc_isr_routine, NULL, ESP_INTR_FLAG_IRAM, NULL);
	printf("register isr (0x%x)\n", ret);

	uint32_t duty = LEDC_TEST_DUTY;
    while (1) {
		uint32_t param; 
		
		ledc_set_fade_with_time(ledc_channel.speed_mode, ledc_channel.channel, duty, LEDC_TEST_FADE_TIME);
		ledc_fade_start(ledc_channel.speed_mode, ledc_channel.channel, LEDC_FADE_NO_WAIT);

		xQueueReceive(xQueue, &param, portMAX_DELAY);
		printf("param = %d", param);
		
		if(duty == 0) {
			duty = LEDC_TEST_DUTY;
		} else {
			duty = 0;
		}
	}
}
the result:
I (28) boot: ESP-IDF v3.1-dev-636-g393f3da3-dirty 2nd stage bootloader
I (28) boot: compile time 12:25:09
I (30) boot: Enabling RNG early entropy source...
I (35) boot: SPI Speed : 40MHz
I (39) boot: SPI Mode : DIO
I (43) boot: SPI Flash Size : 4MB
I (47) boot: Partition Table:
I (51) boot: ## Label Usage Type ST Offset Length
I (58) boot: 0 nvs WiFi data 01 02 00009000 00006000
I (65) boot: 1 phy_init RF data 01 01 0000f000 00001000
I (73) boot: 2 factory factory app 00 00 00010000 00100000
I (80) boot: End of partition table
I (85) esp_image: segment 0: paddr=0x00010020 vaddr=0x3f400020 size=0x05ae4 ( 23268) map
I (102) esp_image: segment 1: paddr=0x00015b0c vaddr=0x3ffb0000 size=0x021c4 ( 8644) load
I (106) esp_image: segment 2: paddr=0x00017cd8 vaddr=0x40080000 size=0x00400 ( 1024) load
I (112) esp_image: segment 3: paddr=0x000180e0 vaddr=0x40080400 size=0x07f30 ( 32560) load
I (134) esp_image: segment 4: paddr=0x00020018 vaddr=0x400d0018 size=0x126f8 ( 75512) map
I (160) esp_image: segment 5: paddr=0x00032718 vaddr=0x40088330 size=0x0094c ( 2380) load
I (162) esp_image: segment 6: paddr=0x0003306c vaddr=0x400c0000 size=0x00000 ( 0) load
I (173) boot: Loaded app from partition at offset 0x10000
I (173) boot: Disabling RNG early entropy source...
I (179) cpu_start: Pro cpu up.
I (182) cpu_start: Starting app cpu, entry point is 0x40080e5c
I (0) cpu_start: App cpu up.
I (193) heap_init: Initializing. RAM available for dynamic allocation:
I (200) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM
I (206) heap_init: At 3FFB2A00 len 0002D600 (181 KiB): DRAM
I (212) heap_init: At 3FFE0440 len 00003BC0 (14 KiB): D/IRAM
I (218) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM
I (225) heap_init: At 40088C7C len 00017384 (92 KiB): IRAM
I (231) cpu_start: Pro cpu start user code
I (249) cpu_start: Starting scheduler on PRO CPU.
I (0) cpu_start: Starting scheduler on APP CPU.
config timer
config channel
func install
register isr (0x105)

ESP_Sprite
Posts: 2806
Joined: Thu Nov 26, 2015 4:08 am

Re: error message ledc_isr_register()

Postby ESP_Sprite » Wed Apr 18, 2018 2:30 am

That's curious; the only time it returns that is if the interrupt allocator is out of C-callable interrupt slots. Do you install ISRs for other peripherals?

Also, if you uncomment the `//define DEBUG_INT_ALLOC_DECISIONS` line in esp-idf/components/esp32/intr_alloc.c and recompile, the interrupt allocator will tell you what exactly it tries to do. Perhaps that can give some more insight? (You may need to disable the interrupt watchdog when doing this.)

ziolelle
Posts: 6
Joined: Tue Apr 17, 2018 1:40 pm

Re: error message ledc_isr_register()

Postby ziolelle » Wed Apr 18, 2018 12:59 pm

Hi, no other ISR installed, all the code I made is what I posted in the previous post.
enabling the ESP32 go PANIC dur to (Interrupt wdt timeout on CPU0) as you can see from the following:
****** config timer (0x0)
D (2423) ledc: LEDC_PWM CHANNEL 0|GPIO 02|Duty 0000|Time 0
****** config channel (0x0)
V (2433) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): checking args
V (2433) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): Args okay. Resulting flags 0x40E
D (2433) intr_alloc: get_available_int: try to find existing. Cpu: 0, Source: 43
D (2433) intr_alloc: get_free_int: start looking. Current cpu: 0
D (2433) intr_alloc: Int 0 reserved 1 level 1 LEVEL hasIsr 0
D (2433) intr_alloc: ....Unusable: reserved
D (2433) intr_alloc: Int 1 reserved 1 level 1 LEVEL hasIsr 0
D (2433) intr_alloc: ....Unusable: reserved
D (2433) intr_alloc: Int 2 reserved 0 level 1 LEVEL hasIsr 1
D (2433) intr_alloc: ....Unusable: already in (non-shared) use.
D (2433) intr_alloc: Int 3 reserved 0 level 1 LEVEL hasIsr 1
D (2433) intr_alloc: ....Unusable: already in (non-shared) use.
D (2433) intr_alloc: Int 4 reserved 1 level 1 LEVEL hasIsr 0
D (2433) intr_alloc: ....Unusable: reserved
D (2433) intr_alloc: Int 5 reserved 1 level 1 LEVEL hasIsr 0
D (2433) intr_alloc: ....Unusable: reserved
D (2433) intr_alloc: Int 6 reserved 1 level 1 EDGE hasIsr 0
D (2433) intr_alloc: ....Unusable: reserved
D (2433) intr_alloc: Int 7 reserved 0 level 1 EDGE hasIsr 0
D (2433) intr_alloc: ....Unusable: special-purpose int
D (2433) intr_alloc: Int 8 reserved 1 level 1 LEVEL hasIsr 0
D (2433) intr_alloc: ....Unusable: reserved
D (2433) intr_alloc: Int 9 reserved 0 level 1 LEVEL hasIsr 1
D (2433) intr_alloc: ....Unusable: already in (non-shared) use.
D (2433) intr_alloc: Int 10 reserved 0 level 1 EDGE hasIsr 0
D (2433) intr_alloc: ....Unusable: incompatible trigger type
D (2433) intr_alloc: Int 11 reserved 0 level 3 EDGE hasIsr 0
D (2433) intr_alloc: ....Unusable: special-purpose int
D (2433) intr_alloc: Int 12 reserved 0 level 1 LEVEL hasIsr 1
D (2433) intr_alloc: ....Unusable: already in (non-shared) use.
D (2433) intr_alloc: Int 13 reserved 0 level 1 LEVEL hasIsr 0
D (2433) intr_alloc: Int 14 reserved 1 level 7 LEVEL hasIsr 0
D (2433) intr_alloc: ....Unusable: reserved
D (2433) intr_alloc: Int 15 reserved 0 level 3 EDGE hasIsr 0
D (2433) intr_alloc: ....Unusable: special-purpose int
D (2433) intr_alloc: Int 16 reserved 0 level 5 EDGE hasIsr 0
D (2433) intr_alloc: ....Unusable: special-purpose int
D (2433) intr_alloc: Int 17 reserved 0 level 1 LEVEL hasIsr 0
D (2433) intr_alloc: ...worse than int 13
D (2433) intr_alloc: Int 18 reserved 0 level 1 LEVEL hasIsr 0
D (2433) intr_alloc: ...worse than int 13
D (2433) intr_alloc: Int 19 reserved 0 level 2 LEVEL hasIsr 0
D (2433) intr_alloc: ...worse than int 13
D (2433) intr_alloc: Int 20 reserved 0 level 2 LEVEL hasIsr 0
D (2433) intr_alloc: ...worse than int 13
D (2433) intr_alloc: Int 21 reserved 0 level 2 LEVEL hasIsr 0
D (2433) intr_alloc: ...worse than int 13
D (2433) intr_alloc: Int 22 reserved 1 level 3 EDGE hasIsr 0
D (2433) intr_alloc: ....Unusable: reserved
D (2433) intr_alloc: Int 23 reserved 0 level 3 LEVEL hasIsr 0
D (2433) intr_alloc: ...worse than int 13
D (2433) intr_alloc: Int 24 reserved 1 level 4 LEVEL hasIsr 0
D (2433) intr_alloc: ....Unusable: reserved
D (2433) intr_alloc: Int 25 reserved 1 level 4 LEVEL hasIsr 0
D (2433) intr_alloc: ....Unusable: reservGuru Meditation Error: Core 0 panic'ed (Interrupt wdt timeout on CPU0)
Core 0 register dump:
PC : 0x4000921a PS : 0x00060434 A0 : 0x80007d16 A1 : 0x3ffb4510
A2 : 0x00800000 A3 : 0x20000000 A4 : 0x00000000 A5 : 0x00000001
A6 : 0x00060423 A7 : 0x00000001 A8 : 0x3ff40000 A9 : 0x00000065
A10 : 0x00800000 A11 : 0x3ff4001c A12 : 0x40083e9c A13 : 0x00000000
A14 : 0x3ffb2994 A15 : 0xff000000 SAR : 0x00000004 EXCCAUSE: 0x00000005
EXCVADDR: 0x00000000 LBEG : 0x400014fd LEND : 0x4000150d LCOUNT : 0xffffffff

Backtrace: 0x4000921a:0x3ffb4510 0x40007d13:0x3ffb4530 0x40007c69:0x3ffb4550 0x40008148:0x3ffb4570 0x400d12cb:0x3ffb4600 0x400d15f5:0x3ffb4620 0x400d17dc:0x3ffb4680 0x400d19cd:0x3ffb46c0 0x400e164c:0x3ffb46f0 0x400e2045:0x3ffb4720 0x400d237b:0x3ffb4740 0x400d0962:0x3ffb4770

Core 1 register dump:
PC : 0x400d1b5e PS : 0x00060034 A0 : 0x80084b91 A1 : 0x3ffb52b0
A2 : 0x00000008 A3 : 0x00000001 A4 : 0x00000001 A5 : 0x3ffb4dec
A6 : 0x00000000 A7 : 0x00000001 A8 : 0x3ffb22bc A9 : 0x3ffb2280
A10 : 0x00000000 A11 : 0x80000001 A12 : 0x00000000 A13 : 0x00000001
A14 : 0x00060021 A15 : 0x00000000 SAR : 0x00000000 EXCCAUSE: 0x00000005
EXCVADDR: 0x00000000 LBEG : 0x00000000 LEND : 0x00000000 LCOUNT : 0x00000000

Backtrace: 0x400d1b5e:0x3ffb52b0 0x40084b8e:0x3ffb52d0
So I disabled WDT in the config of the project and the result (OUTLINED IN BOLD in the end) is this (so sorry for the loooong output):
I (28) boot: ESP-IDF v3.1-dev-636-g393f3da3-dirty 2nd stage bootloader
I (28) boot: compile time 14:52:43
I (30) boot: Enabling RNG early entropy source...
I (35) boot: SPI Speed : 40MHz
I (39) boot: SPI Mode : DIO
I (43) boot: SPI Flash Size : 4MB
I (47) boot: Partition Table:
I (51) boot: ## Label Usage Type ST Offset Length
I (58) boot: 0 nvs WiFi data 01 02 00009000 00006000
I (65) boot: 1 phy_init RF data 01 01 0000f000 00001000
I (73) boot: 2 factory factory app 00 00 00010000 00100000
I (80) boot: End of partition table
I (85) esp_image: segment 0: paddr=0x00010020 vaddr=0x3f400020 size=0x06270 ( 25200) map
I (102) esp_image: segment 1: paddr=0x00016298 vaddr=0x3ffb0000 size=0x021ac ( 8620) load
I (106) esp_image: segment 2: paddr=0x0001844c vaddr=0x40080000 size=0x00400 ( 1024) load
I (112) esp_image: segment 3: paddr=0x00018854 vaddr=0x40080400 size=0x077bc ( 30652) load
I (133) esp_image: segment 4: paddr=0x00020018 vaddr=0x400d0018 size=0x12670 ( 75376) map
I (160) esp_image: segment 5: paddr=0x00032690 vaddr=0x40087bbc size=0x01040 ( 4160) load
I (162) esp_image: segment 6: paddr=0x000336d8 vaddr=0x400c0000 size=0x00000 ( 0) load
I (172) boot: Loaded app from partition at offset 0x10000
I (172) boot: Disabling RNG early entropy source...
I (178) cpu_start: Pro cpu up.
I (182) cpu_start: Starting app cpu, entry point is 0x40080e50
I (0) cpu_start: App cpu up.
I (192) heap_init: Initializing. RAM available for dynamic allocation:
D (199) heap_init: New heap initialised at 0x3ffae6e0
I (204) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM
D (210) heap_init: New heap initialised at 0x3ffb29e8
I (215) heap_init: At 3FFB29E8 len 0002D618 (181 KiB): DRAM
I (222) heap_init: At 3FFE0440 len 00003BC0 (14 KiB): D/IRAM
I (228) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM
D (234) heap_init: New heap initialised at 0x40088bfc
I (239) heap_init: At 40088BFC len 00017404 (93 KiB): IRAM
I (246) cpu_start: Pro cpu start user code
D (258) clk: RTC_SLOW_CLK calibration value: 3226330
V (267) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): checking args
V (267) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): Args okay. Resulting flags 0xE
D (272) intr_alloc: get_available_int: try to find existing. Cpu: 0, Source: 46
D (279) intr_alloc: get_free_int: start looking. Current cpu: 0
D (285) intr_alloc: Int 0 reserved 1 level 1 LEVEL hasIsr 0
D (291) intr_alloc: ....Unusable: reserved
D (295) intr_alloc: Int 1 reserved 1 level 1 LEVEL hasIsr 0
D (301) intr_alloc: ....Unusable: reserved
D (305) intr_alloc: Int 2 reserved 0 level 1 LEVEL hasIsr 0
D (311) intr_alloc: Int 3 reserved 0 level 1 LEVEL hasIsr 0
D (316) intr_alloc: ...worse than int 2
D (320) intr_alloc: Int 4 reserved 1 level 1 LEVEL hasIsr 0
D (326) intr_alloc: ....Unusable: reserved
D (330) intr_alloc: Int 5 reserved 1 level 1 LEVEL hasIsr 0
D (336) intr_alloc: ....Unusable: reserved
D (340) intr_alloc: Int 6 reserved 1 level 1 EDGE hasIsr 0
D (345) intr_alloc: ....Unusable: reserved
D (349) intr_alloc: Int 7 reserved 0 level 1 EDGE hasIsr 0
D (355) intr_alloc: ....Unusable: special-purpose int
D (360) intr_alloc: Int 8 reserved 1 level 1 LEVEL hasIsr 0
D (366) intr_alloc: ....Unusable: reserved
D (370) intr_alloc: Int 9 reserved 0 level 1 LEVEL hasIsr 0
D (376) intr_alloc: ...worse than int 2
D (379) intr_alloc: Int 10 reserved 0 level 1 EDGE hasIsr 0
D (385) intr_alloc: ....Unusable: incompatible trigger type
D (391) intr_alloc: Int 11 reserved 0 level 3 EDGE hasIsr 0
D (396) intr_alloc: ....Unusable: special-purpose int
D (402) intr_alloc: Int 12 reserved 0 level 1 LEVEL hasIsr 0
D (407) intr_alloc: ...worse than int 2
D (411) intr_alloc: Int 13 reserved 0 level 1 LEVEL hasIsr 0
D (417) intr_alloc: ...worse than int 2
D (421) intr_alloc: Int 14 reserved 1 level 7 LEVEL hasIsr 0
D (427) intr_alloc: ....Unusable: reserved
D (431) intr_alloc: Int 15 reserved 0 level 3 EDGE hasIsr 0
D (436) intr_alloc: ....Unusable: special-purpose int
D (441) intr_alloc: Int 16 reserved 0 level 5 EDGE hasIsr 0
D (447) intr_alloc: ....Unusable: special-purpose int
D (452) intr_alloc: Int 17 reserved 0 level 1 LEVEL hasIsr 0
D (458) intr_alloc: ...worse than int 2
D (462) intr_alloc: Int 18 reserved 0 level 1 LEVEL hasIsr 0
D (468) intr_alloc: ...worse than int 2
D (471) intr_alloc: Int 19 reserved 0 level 2 LEVEL hasIsr 0
D (477) intr_alloc: ...worse than int 2
D (481) intr_alloc: Int 20 reserved 0 level 2 LEVEL hasIsr 0
D (487) intr_alloc: ...worse than int 2
D (491) intr_alloc: Int 21 reserved 0 level 2 LEVEL hasIsr 0
D (496) intr_alloc: ...worse than int 2
D (500) intr_alloc: Int 22 reserved 1 level 3 EDGE hasIsr 0
D (506) intr_alloc: ....Unusable: reserved
D (510) intr_alloc: Int 23 reserved 0 level 3 LEVEL hasIsr 0
D (516) intr_alloc: ...worse than int 2
D (520) intr_alloc: Int 24 reserved 1 level 4 LEVEL hasIsr 0
D (526) intr_alloc: ....Unusable: reserved
D (530) intr_alloc: Int 25 reserved 1 level 4 LEVEL hasIsr 0
D (535) intr_alloc: ....Unusable: reserved
D (540) intr_alloc: Int 26 reserved 1 level 5 LEVEL hasIsr 0
D (545) intr_alloc: ....Unusable: reserved
D (550) intr_alloc: Int 27 reserved 1 level 3 LEVEL hasIsr 0
D (555) intr_alloc: ....Unusable: reserved
D (559) intr_alloc: Int 28 reserved 0 level 4 EDGE hasIsr 0
D (565) intr_alloc: ....Unusable: incompatible level
D (570) intr_alloc: Int 29 reserved 0 level 3 EDGE hasIsr 0
D (576) intr_alloc: ....Unusable: special-purpose int
D (581) intr_alloc: Int 30 reserved 1 level 4 EDGE hasIsr 0
D (586) intr_alloc: ....Unusable: reserved
D (591) intr_alloc: Int 31 reserved 1 level 5 LEVEL hasIsr 0
D (596) intr_alloc: ....Unusable: reserved
D (601) intr_alloc: get_available_int: using int 2
D (605) intr_alloc: Connected src 46 to int 2 (cpu 0)
V (611) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): checking args
V (617) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): Args okay. Resulting flags 0xC0E
D (625) intr_alloc: get_available_int: try to find existing. Cpu: 0, Source: 57
D (632) intr_alloc: get_free_int: start looking. Current cpu: 0
D (638) intr_alloc: Int 0 reserved 1 level 1 LEVEL hasIsr 0
D (644) intr_alloc: ....Unusable: reserved
D (648) intr_alloc: Int 1 reserved 1 level 1 LEVEL hasIsr 0
D (654) intr_alloc: ....Unusable: reserved
D (658) intr_alloc: Int 2 reserved 0 level 1 LEVEL hasIsr 1
D (664) intr_alloc: ....Unusable: already in (non-shared) use.
D (670) intr_alloc: Int 3 reserved 0 level 1 LEVEL hasIsr 0
D (675) intr_alloc: Int 4 reserved 1 level 1 LEVEL hasIsr 0
D (681) intr_alloc: ....Unusable: reserved
D (685) intr_alloc: Int 5 reserved 1 level 1 LEVEL hasIsr 0
D (691) intr_alloc: ....Unusable: reserved
D (695) intr_alloc: Int 6 reserved 1 level 1 EDGE hasIsr 0
D (700) intr_alloc: ....Unusable: reserved
D (705) intr_alloc: Int 7 reserved 0 level 1 EDGE hasIsr 0
D (710) intr_alloc: ....Unusable: special-purpose int
D (715) intr_alloc: Int 8 reserved 1 level 1 LEVEL hasIsr 0
D (721) intr_alloc: ....Unusable: reserved
D (725) intr_alloc: Int 9 reserved 0 level 1 LEVEL hasIsr 0
D (731) intr_alloc: ...worse than int 3
D (735) intr_alloc: Int 10 reserved 0 level 1 EDGE hasIsr 0
D (740) intr_alloc: ....Unusable: incompatible trigger type
D (746) intr_alloc: Int 11 reserved 0 level 3 EDGE hasIsr 0
D (752) intr_alloc: ....Unusable: special-purpose int
D (757) intr_alloc: Int 12 reserved 0 level 1 LEVEL hasIsr 0
D (762) intr_alloc: ...worse than int 3
D (766) intr_alloc: Int 13 reserved 0 level 1 LEVEL hasIsr 0
D (772) intr_alloc: ...worse than int 3
D (776) intr_alloc: Int 14 reserved 1 level 7 LEVEL hasIsr 0
D (782) intr_alloc: ....Unusable: reserved
D (786) intr_alloc: Int 15 reserved 0 level 3 EDGE hasIsr 0
D (791) intr_alloc: ....Unusable: special-purpose int
D (797) intr_alloc: Int 16 reserved 0 level 5 EDGE hasIsr 0
D (802) intr_alloc: ....Unusable: special-purpose int
D (807) intr_alloc: Int 17 reserved 0 level 1 LEVEL hasIsr 0
D (813) intr_alloc: ...worse than int 3
D (817) intr_alloc: Int 18 reserved 0 level 1 LEVEL hasIsr 0
D (823) intr_alloc: ...worse than int 3
D (827) intr_alloc: Int 19 reserved 0 level 2 LEVEL hasIsr 0
D (832) intr_alloc: ...worse than int 3
D (836) intr_alloc: Int 20 reserved 0 level 2 LEVEL hasIsr 0
D (842) intr_alloc: ...worse than int 3
D (846) intr_alloc: Int 21 reserved 0 level 2 LEVEL hasIsr 0
D (852) intr_alloc: ...worse than int 3
D (855) intr_alloc: Int 22 reserved 1 level 3 EDGE hasIsr 0
D (861) intr_alloc: ....Unusable: reserved
D (865) intr_alloc: Int 23 reserved 0 level 3 LEVEL hasIsr 0
D (871) intr_alloc: ...worse than int 3
D (875) intr_alloc: Int 24 reserved 1 level 4 LEVEL hasIsr 0
D (881) intr_alloc: ....Unusable: reserved
D (885) intr_alloc: Int 25 reserved 1 level 4 LEVEL hasIsr 0
D (891) intr_alloc: ....Unusable: reserved
D (895) intr_alloc: Int 26 reserved 1 level 5 LEVEL hasIsr 0
D (900) intr_alloc: ....Unusable: reserved
D (905) intr_alloc: Int 27 reserved 1 level 3 LEVEL hasIsr 0
D (910) intr_alloc: ....Unusable: reserved
D (915) intr_alloc: Int 28 reserved 0 level 4 EDGE hasIsr 0
D (920) intr_alloc: ....Unusable: incompatible level
D (925) intr_alloc: Int 29 reserved 0 level 3 EDGE hasIsr 0
D (931) intr_alloc: ....Unusable: special-purpose int
D (936) intr_alloc: Int 30 reserved 1 level 4 EDGE hasIsr 0
D (942) intr_alloc: ....Unusable: reserved
D (946) intr_alloc: Int 31 reserved 1 level 5 LEVEL hasIsr 0
D (951) intr_alloc: ....Unusable: reserved
D (956) intr_alloc: get_available_int: using int 3
D (961) intr_alloc: Connected src 57 to int 3 (cpu 0)
V (966) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): checking args
V (972) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): Args okay. Resulting flags 0x40E
D (980) intr_alloc: get_available_int: try to find existing. Cpu: 0, Source: 24
D (988) intr_alloc: get_free_int: start looking. Current cpu: 0
D (994) intr_alloc: Int 0 reserved 1 level 1 LEVEL hasIsr 0
D (999) intr_alloc: ....Unusable: reserved
D (1003) intr_alloc: Int 1 reserved 1 level 1 LEVEL hasIsr 0
D (1009) intr_alloc: ....Unusable: reserved
D (1013) intr_alloc: Int 2 reserved 0 level 1 LEVEL hasIsr 1
D (1019) intr_alloc: ....Unusable: already in (non-shared) use.
D (1025) intr_alloc: Int 3 reserved 0 level 1 LEVEL hasIsr 1
D (1031) intr_alloc: ....Unusable: already in (non-shared) use.
D (1037) intr_alloc: Int 4 reserved 1 level 1 LEVEL hasIsr 0
D (1042) intr_alloc: ....Unusable: reserved
D (1047) intr_alloc: Int 5 reserved 1 level 1 LEVEL hasIsr 0
D (1052) intr_alloc: ....Unusable: reserved
D (1057) intr_alloc: Int 6 reserved 1 level 1 EDGE hasIsr 0
D (1062) intr_alloc: ....Unusable: reserved
D (1067) intr_alloc: Int 7 reserved 0 level 1 EDGE hasIsr 0
D (1072) intr_alloc: ....Unusable: special-purpose int
D (1077) intr_alloc: Int 8 reserved 1 level 1 LEVEL hasIsr 0
D (1083) intr_alloc: ....Unusable: reserved
D (1087) intr_alloc: Int 9 reserved 0 level 1 LEVEL hasIsr 0
D (1093) intr_alloc: Int 10 reserved 0 level 1 EDGE hasIsr 0
D (1099) intr_alloc: ....Unusable: incompatible trigger type
D (1105) intr_alloc: Int 11 reserved 0 level 3 EDGE hasIsr 0
D (1110) intr_alloc: ....Unusable: special-purpose int
D (1116) intr_alloc: Int 12 reserved 0 level 1 LEVEL hasIsr 0
D (1121) intr_alloc: ...worse than int 9
D (1125) intr_alloc: Int 13 reserved 0 level 1 LEVEL hasIsr 0
D (1131) intr_alloc: ...worse than int 9
D (1135) intr_alloc: Int 14 reserved 1 level 7 LEVEL hasIsr 0
D (1141) intr_alloc: ....Unusable: reserved
D (1145) intr_alloc: Int 15 reserved 0 level 3 EDGE hasIsr 0
D (1151) intr_alloc: ....Unusable: special-purpose int
D (1156) intr_alloc: Int 16 reserved 0 level 5 EDGE hasIsr 0
D (1162) intr_alloc: ....Unusable: special-purpose int
D (1167) intr_alloc: Int 17 reserved 0 level 1 LEVEL hasIsr 0
D (1173) intr_alloc: ...worse than int 9
D (1177) intr_alloc: Int 18 reserved 0 level 1 LEVEL hasIsr 0
D (1183) intr_alloc: ...worse than int 9
D (1187) intr_alloc: Int 19 reserved 0 level 2 LEVEL hasIsr 0
D (1193) intr_alloc: ...worse than int 9
D (1197) intr_alloc: Int 20 reserved 0 level 2 LEVEL hasIsr 0
D (1202) intr_alloc: ...worse than int 9
D (1206) intr_alloc: Int 21 reserved 0 level 2 LEVEL hasIsr 0
D (1212) intr_alloc: ...worse than int 9
D (1216) intr_alloc: Int 22 reserved 1 level 3 EDGE hasIsr 0
D (1222) intr_alloc: ....Unusable: reserved
D (1226) intr_alloc: Int 23 reserved 0 level 3 LEVEL hasIsr 0
D (1232) intr_alloc: ...worse than int 9
D (1236) intr_alloc: Int 24 reserved 1 level 4 LEVEL hasIsr 0
D (1242) intr_alloc: ....Unusable: reserved
D (1246) intr_alloc: Int 25 reserved 1 level 4 LEVEL hasIsr 0
D (1252) intr_alloc: ....Unusable: reserved
D (1256) intr_alloc: Int 26 reserved 1 level 5 LEVEL hasIsr 0
D (1262) intr_alloc: ....Unusable: reserved
D (1266) intr_alloc: Int 27 reserved 1 level 3 LEVEL hasIsr 0
D (1272) intr_alloc: ....Unusable: reserved
D (1276) intr_alloc: Int 28 reserved 0 level 4 EDGE hasIsr 0
D (1282) intr_alloc: ....Unusable: incompatible level
D (1287) intr_alloc: Int 29 reserved 0 level 3 EDGE hasIsr 0
D (1293) intr_alloc: ....Unusable: special-purpose int
D (1298) intr_alloc: Int 30 reserved 1 level 4 EDGE hasIsr 0
D (1304) intr_alloc: ....Unusable: reserved
D (1308) intr_alloc: Int 31 reserved 1 level 5 LEVEL hasIsr 0
D (1314) intr_alloc: ....Unusable: reserved
D (1318) intr_alloc: get_available_int: using int 9
D (1323) intr_alloc: Connected src 24 to int 9 (cpu 0)
I (1329) cpu_start: Starting scheduler on PRO CPU.
V (0) intr_alloc: esp_intr_alloc_intrstatus (cpu 1): checking args
V (0) intr_alloc: esp_intr_alloc_intrstatus (cpu 1): Args okay. Resulting flags 0x40E
D (10) intr_alloc: get_available_int: try to find existing. Cpu: 1, Source: 25
D (20) intr_alloc: get_free_int: start looking. Current cpu: 1
D (20) intr_alloc: Int 0 reserved 1 level 1 LEVEL hasIsr 0
D (30) intr_alloc: ....Unusable: reserved
D (30) intr_alloc: Int 1 reserved 1 level 1 LEVEL hasIsr 0
D (40) intr_alloc: ....Unusable: reserved
D (40) intr_alloc: Int 2 reserved 0 level 1 LEVEL hasIsr 0
D (50) intr_alloc: Int 3 reserved 0 level 1 LEVEL hasIsr 0
D (50) intr_alloc: ...worse than int 2
D (60) intr_alloc: Int 4 reserved 0 level 1 LEVEL hasIsr 0
D (60) intr_alloc: ...worse than int 2
D (70) intr_alloc: Int 5 reserved 1 level 1 LEVEL hasIsr 0
D (70) intr_alloc: ....Unusable: reserved
D (80) intr_alloc: Int 6 reserved 1 level 1 EDGE hasIsr 0
D (80) intr_alloc: ....Unusable: reserved
D (80) intr_alloc: Int 7 reserved 0 level 1 EDGE hasIsr 0
D (90) intr_alloc: ....Unusable: special-purpose int
D (100) intr_alloc: Int 8 reserved 1 level 1 LEVEL hasIsr 0
D (100) intr_alloc: ....Unusable: reserved
D (110) intr_alloc: Int 9 reserved 0 level 1 LEVEL hasIsr 0
D (110) intr_alloc: ...worse than int 2
D (110) intr_alloc: Int 10 reserved 0 level 1 EDGE hasIsr 0
D (120) intr_alloc: ....Unusable: incompatible trigger type
D (130) intr_alloc: Int 11 reserved 0 level 3 EDGE hasIsr 0
D (130) intr_alloc: ....Unusable: special-purpose int
D (140) intr_alloc: Int 12 reserved 0 level 1 LEVEL hasIsr 0
D (140) intr_alloc: ...worse than int 2
D (150) intr_alloc: Int 13 reserved 0 level 1 LEVEL hasIsr 0
D (150) intr_alloc: ...worse than int 2
D (160) intr_alloc: Int 14 reserved 1 level 7 LEVEL hasIsr 0
D (160) intr_alloc: ....Unusable: reserved
D (170) intr_alloc: Int 15 reserved 0 level 3 EDGE hasIsr 0
D (170) intr_alloc: ....Unusable: special-purpose int
D (180) intr_alloc: Int 16 reserved 0 level 5 EDGE hasIsr 0
D (180) intr_alloc: ....Unusable: special-purpose int
D (190) intr_alloc: Int 17 reserved 0 level 1 LEVEL hasIsr 0
D (190) intr_alloc: ...worse than int 2
D (200) intr_alloc: Int 18 reserved 0 level 1 LEVEL hasIsr 0
D (200) intr_alloc: ...worse than int 2
D (210) intr_alloc: Int 19 reserved 0 level 2 LEVEL hasIsr 0
D (210) intr_alloc: ...worse than int 2
D (220) intr_alloc: Int 20 reserved 0 level 2 LEVEL hasIsr 0
D (220) intr_alloc: ...worse than int 2
D (230) intr_alloc: Int 21 reserved 0 level 2 LEVEL hasIsr 0
D (230) intr_alloc: ...worse than int 2
D (240) intr_alloc: Int 22 reserved 0 level 3 EDGE hasIsr 0
D (240) intr_alloc: ....Unusable: incompatible trigger type
D (250) intr_alloc: Int 23 reserved 0 level 3 LEVEL hasIsr 0
D (250) intr_alloc: ...worse than int 2
D (260) intr_alloc: Int 24 reserved 0 level 4 LEVEL hasIsr 0
D (260) intr_alloc: ....Unusable: incompatible level
D (270) intr_alloc: Int 25 reserved 1 level 4 LEVEL hasIsr 0
D (270) intr_alloc: ....Unusable: reserved
D (280) intr_alloc: Int 26 reserved 1 level 5 LEVEL hasIsr 0
D (280) intr_alloc: ....Unusable: reserved
D (290) intr_alloc: Int 27 reserved 1 level 3 LEVEL hasIsr 0
D (290) intr_alloc: ....Unusable: reserved
D (300) intr_alloc: Int 28 reserved 0 level 4 EDGE hasIsr 0
D (300) intr_alloc: ....Unusable: incompatible level
D (310) intr_alloc: Int 29 reserved 0 level 3 EDGE hasIsr 0
D (310) intr_alloc: ....Unusable: special-purpose int
D (320) intr_alloc: Int 30 reserved 1 level 4 EDGE hasIsr 0
D (320) intr_alloc: ....Unusable: reserved
D (330) intr_alloc: Int 31 reserved 1 level 5 LEVEL hasIsr 0
D (330) intr_alloc: ....Unusable: reserved
D (340) intr_alloc: get_available_int: using int 2
D (340) intr_alloc: Connected src 25 to int 2 (cpu 1)
I (350) cpu_start: Starting scheduler on APP CPU.
D (2042) heap_init: New heap initialised at 0x3ffe0440
D (2052) heap_init: New heap initialised at 0x3ffe4350
V (2052) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): checking args
V (2052) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): Args okay. Resulting flags 0xE
D (2052) intr_alloc: get_available_int: try to find existing. Cpu: 0, Source: 16
D (2052) intr_alloc: get_free_int: start looking. Current cpu: 0
D (2052) intr_alloc: Int 0 reserved 1 level 1 LEVEL hasIsr 0
D (2052) intr_alloc: ....Unusable: reserved
D (2052) intr_alloc: Int 1 reserved 1 level 1 LEVEL hasIsr 0
D (2052) intr_alloc: ....Unusable: reserved
D (2052) intr_alloc: Int 2 reserved 0 level 1 LEVEL hasIsr 1
D (2052) intr_alloc: ....Unusable: already in (non-shared) use.
D (2052) intr_alloc: Int 3 reserved 0 level 1 LEVEL hasIsr 1
D (2052) intr_alloc: ....Unusable: already in (non-shared) use.
D (2052) intr_alloc: Int 4 reserved 1 level 1 LEVEL hasIsr 0
D (2052) intr_alloc: ....Unusable: reserved
D (2052) intr_alloc: Int 5 reserved 1 level 1 LEVEL hasIsr 0
D (2052) intr_alloc: ....Unusable: reserved
D (2052) intr_alloc: Int 6 reserved 1 level 1 EDGE hasIsr 0
D (2052) intr_alloc: ....Unusable: reserved
D (2052) intr_alloc: Int 7 reserved 0 level 1 EDGE hasIsr 0
D (2052) intr_alloc: ....Unusable: special-purpose int
D (2052) intr_alloc: Int 8 reserved 1 level 1 LEVEL hasIsr 0
D (2052) intr_alloc: ....Unusable: reserved
D (2052) intr_alloc: Int 9 reserved 0 level 1 LEVEL hasIsr 1
D (2052) intr_alloc: ....Unusable: already in (non-shared) use.
D (2052) intr_alloc: Int 10 reserved 0 level 1 EDGE hasIsr 0
D (2052) intr_alloc: ....Unusable: incompatible trigger type
D (2052) intr_alloc: Int 11 reserved 0 level 3 EDGE hasIsr 0
D (2052) intr_alloc: ....Unusable: special-purpose int
D (2052) intr_alloc: Int 12 reserved 0 level 1 LEVEL hasIsr 0
D (2052) intr_alloc: Int 13 reserved 0 level 1 LEVEL hasIsr 0
D (2052) intr_alloc: ...worse than int 12
D (2052) intr_alloc: Int 14 reserved 1 level 7 LEVEL hasIsr 0
D (2052) intr_alloc: ....Unusable: reserved
D (2052) intr_alloc: Int 15 reserved 0 level 3 EDGE hasIsr 0
D (2052) intr_alloc: ....Unusable: special-purpose int
D (2052) intr_alloc: Int 16 reserved 0 level 5 EDGE hasIsr 0
D (2052) intr_alloc: ....Unusable: special-purpose int
D (2052) intr_alloc: Int 17 reserved 0 level 1 LEVEL hasIsr 0
D (2052) intr_alloc: ...worse than int 12
D (2052) intr_alloc: Int 18 reserved 0 level 1 LEVEL hasIsr 0
D (2052) intr_alloc: ...worse than int 12
D (2052) intr_alloc: Int 19 reserved 0 level 2 LEVEL hasIsr 0
D (2052) intr_alloc: ...worse than int 12
D (2052) intr_alloc: Int 20 reserved 0 level 2 LEVEL hasIsr 0
D (2052) intr_alloc: ...worse than int 12
D (2052) intr_alloc: Int 21 reserved 0 level 2 LEVEL hasIsr 0
D (2052) intr_alloc: ...worse than int 12
D (2052) intr_alloc: Int 22 reserved 1 level 3 EDGE hasIsr 0
D (2052) intr_alloc: ....Unusable: reserved
D (2052) intr_alloc: Int 23 reserved 0 level 3 LEVEL hasIsr 0
D (2052) intr_alloc: ...worse than int 12
D (2052) intr_alloc: Int 24 reserved 1 level 4 LEVEL hasIsr 0
D (2052) intr_alloc: ....Unusable: reserved
D (2052) intr_alloc: Int 25 reserved 1 level 4 LEVEL hasIsr 0
D (2052) intr_alloc: ....Unusable: reserved
D (2052) intr_alloc: Int 26 reserved 1 level 5 LEVEL hasIsr 0
D (2052) intr_alloc: ....Unusable: reserved
D (2052) intr_alloc: Int 27 reserved 1 level 3 LEVEL hasIsr 0
D (2052) intr_alloc: ....Unusable: reserved
D (2052) intr_alloc: Int 28 reserved 0 level 4 EDGE hasIsr 0
D (2052) intr_alloc: ....Unusable: incompatible level
D (2052) intr_alloc: Int 29 reserved 0 level 3 EDGE hasIsr 0
D (2052) intr_alloc: ....Unusable: special-purpose int
D (2052) intr_alloc: Int 30 reserved 1 level 4 EDGE hasIsr 0
D (2052) intr_alloc: ....Unusable: reserved
D (2052) intr_alloc: Int 31 reserved 1 level 5 LEVEL hasIsr 0
D (2052) intr_alloc: ....Unusable: reserved
D (2052) intr_alloc: get_available_int: using int 12
D (2052) intr_alloc: Connected src 16 to int 12 (cpu 0)
****** config timer (0x0)
D (2422) ledc: LEDC_PWM CHANNEL 0|GPIO 02|Duty 0000|Time 0
****** config channel (0x0)
V (2432) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): checking args
V (2432) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): Args okay. Resulting flags 0x40E
D (2432) intr_alloc: get_available_int: try to find existing. Cpu: 0, Source: 43
D (2432) intr_alloc: get_free_int: start looking. Current cpu: 0
D (2432) intr_alloc: Int 0 reserved 1 level 1 LEVEL hasIsr 0
D (2432) intr_alloc: ....Unusable: reserved
D (2432) intr_alloc: Int 1 reserved 1 level 1 LEVEL hasIsr 0
D (2432) intr_alloc: ....Unusable: reserved
D (2432) intr_alloc: Int 2 reserved 0 level 1 LEVEL hasIsr 1
D (2432) intr_alloc: ....Unusable: already in (non-shared) use.
D (2432) intr_alloc: Int 3 reserved 0 level 1 LEVEL hasIsr 1
D (2432) intr_alloc: ....Unusable: already in (non-shared) use.
D (2432) intr_alloc: Int 4 reserved 1 level 1 LEVEL hasIsr 0
D (2432) intr_alloc: ....Unusable: reserved
D (2432) intr_alloc: Int 5 reserved 1 level 1 LEVEL hasIsr 0
D (2432) intr_alloc: ....Unusable: reserved
D (2432) intr_alloc: Int 6 reserved 1 level 1 EDGE hasIsr 0
D (2432) intr_alloc: ....Unusable: reserved
D (2432) intr_alloc: Int 7 reserved 0 level 1 EDGE hasIsr 0
D (2432) intr_alloc: ....Unusable: special-purpose int
D (2432) intr_alloc: Int 8 reserved 1 level 1 LEVEL hasIsr 0
D (2432) intr_alloc: ....Unusable: reserved
D (2432) intr_alloc: Int 9 reserved 0 level 1 LEVEL hasIsr 1
D (2432) intr_alloc: ....Unusable: already in (non-shared) use.
D (2432) intr_alloc: Int 10 reserved 0 level 1 EDGE hasIsr 0
D (2432) intr_alloc: ....Unusable: incompatible trigger type
D (2432) intr_alloc: Int 11 reserved 0 level 3 EDGE hasIsr 0
D (2432) intr_alloc: ....Unusable: special-purpose int
D (2432) intr_alloc: Int 12 reserved 0 level 1 LEVEL hasIsr 1
D (2432) intr_alloc: ....Unusable: already in (non-shared) use.
D (2432) intr_alloc: Int 13 reserved 0 level 1 LEVEL hasIsr 0
D (2432) intr_alloc: Int 14 reserved 1 level 7 LEVEL hasIsr 0
D (2432) intr_alloc: ....Unusable: reserved
D (2432) intr_alloc: Int 15 reserved 0 level 3 EDGE hasIsr 0
D (2432) intr_alloc: ....Unusable: special-purpose int
D (2432) intr_alloc: Int 16 reserved 0 level 5 EDGE hasIsr 0
D (2432) intr_alloc: ....Unusable: special-purpose int
D (2432) intr_alloc: Int 17 reserved 0 level 1 LEVEL hasIsr 0
D (2432) intr_alloc: ...worse than int 13
D (2432) intr_alloc: Int 18 reserved 0 level 1 LEVEL hasIsr 0
D (2432) intr_alloc: ...worse than int 13
D (2432) intr_alloc: Int 19 reserved 0 level 2 LEVEL hasIsr 0
D (2432) intr_alloc: ...worse than int 13
D (2432) intr_alloc: Int 20 reserved 0 level 2 LEVEL hasIsr 0
D (2432) intr_alloc: ...worse than int 13
D (2432) intr_alloc: Int 21 reserved 0 level 2 LEVEL hasIsr 0
D (2432) intr_alloc: ...worse than int 13
D (2432) intr_alloc: Int 22 reserved 1 level 3 EDGE hasIsr 0
D (2432) intr_alloc: ....Unusable: reserved
D (2432) intr_alloc: Int 23 reserved 0 level 3 LEVEL hasIsr 0
D (2432) intr_alloc: ...worse than int 13
D (2432) intr_alloc: Int 24 reserved 1 level 4 LEVEL hasIsr 0
D (2432) intr_alloc: ....Unusable: reserved
D (2432) intr_alloc: Int 25 reserved 1 level 4 LEVEL hasIsr 0
D (2432) intr_alloc: ....Unusable: reserved
D (2432) intr_alloc: Int 26 reserved 1 level 5 LEVEL hasIsr 0
D (2432) intr_alloc: ....Unusable: reserved
D (2432) intr_alloc: Int 27 reserved 1 level 3 LEVEL hasIsr 0
D (2432) intr_alloc: ....Unusable: reserved
D (2432) intr_alloc: Int 28 reserved 0 level 4 EDGE hasIsr 0
D (2432) intr_alloc: ....Unusable: incompatible level
D (2432) intr_alloc: Int 29 reserved 0 level 3 EDGE hasIsr 0
D (2432) intr_alloc: ....Unusable: special-purpose int
D (2432) intr_alloc: Int 30 reserved 1 level 4 EDGE hasIsr 0
D (2432) intr_alloc: ....Unusable: reserved
D (2432) intr_alloc: Int 31 reserved 1 level 5 LEVEL hasIsr 0
D (2432) intr_alloc: ....Unusable: reserved
D (2432) intr_alloc: get_available_int: using int 13
D (2432) intr_alloc: Connected src 43 to int 13 (cpu 0)
****** func install (0x0)
V (2802) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): checking args
V (2802) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): Args okay. Resulting flags 0x40E
D (2802) intr_alloc: get_available_int: try to find existing. Cpu: 0, Source: 43
D (2802) intr_alloc: get_avalible_int: existing vd found. intno: 13
D (2802) intr_alloc: ....Unusable: already in (non-shared) use.
D (2802) intr_alloc: get_avalible_int: existing vd invalid.

****** register isr (p=0x40082a64) (0x105)
D (2842) ledc: cur duty: 0; target: 4000, step: 1023, cycle: 1; scale: 1

ESP_Sprite
Posts: 2806
Joined: Thu Nov 26, 2015 4:08 am

Re: error message ledc_isr_register()

Postby ESP_Sprite » Wed Apr 18, 2018 3:22 pm

Ah, I think I see what's happening. You also install an ISR for the fade function, which essentially hooks into the same ISR as you're trying to register yourself later. The ISR tries to hook into the same interrupt, assuming you're trying to explicitly build a shared interrupt, but as the fade service isn't registered with that the attempt fails. This is actually stated (although somewhat obscurely) in the ledc_fade_func_install documentation: 'This function will occupy interrupt of LEDC module.'.

What you can try is adding the ESP_INTR_FLAG_SHARED flag to your ledc_fade_func_install and ledc_isr_register calls. You may need to check the peripheral interrupt flags in your ISR, however, as shared interrupt ISRs can also be called for entirely other reasons, and the LED driver doesn't do any checks on that by itself.

ziolelle
Posts: 6
Joined: Tue Apr 17, 2018 1:40 pm

Re: error message ledc_isr_register()

Postby ziolelle » Fri Apr 20, 2018 7:35 am

That's right, I made like you told me:

Code: Select all

	// Initialize fade service.
	ret = ledc_fade_func_install(ESP_INTR_FLAG_IRAM|ESP_INTR_FLAG_SHARED);

	// enable ISR routine
	ret = ledc_isr_register(ledc_isr_routine, NULL, ESP_INTR_FLAG_IRAM|ESP_INTR_FLAG_SHARED, NULL);
And it works

Thanks again

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